FUJITSU MICROELECTRONICS
DATA SHEET
DS04-21361-3Ea
ASSP
Dual Serial Input
PLL Frequency Synthesizer
MB15F07SL
■
DESCRIPTION
The Fujitsu Microelectronics MB15F07SL is a serial input Phase Locked Loop (PLL) frequency synthesizer with two
1100 MHz prescalers. The two 1100 MHz prescalers have a dual modulus division ratio of 128/129 or 64/65 enabling
pulse swallowing operation.
The supply voltage range is between 2.4 V and 3.6 V. The MB15F07SL uses the latest BiCMOS process. As a result,
the supply current is typically 5 mA at 2.7 V. A refined charge pump supplies a well-balanced output current of 1.5
mA or 6 mA. The charge pump current is selectable by serial data.
MB15F07SL is ideally suited for wireless mobile communications, such as GSM and PDC.
■
FEATURES
• High frequency operation: PLL 1, 2: 1100 MHz max
• Low power supply voltage: V
CC
= 2.4 to 3.6 V
• Ultra Low power supply current: I
CC
= 5.0 mA typ. (V
CC
= 2.7 V, Ta = +25°C, in PLL1, 2 locking state)
I
CC
= 5.5 mA typ. (V
CC
= 3.0 V, Ta = +25°C, in PLL1, 2 locking state)
• Direct power saving function: Power supply current in power saving mode
Typ. 0.1
µA
(V
CC
= 3.0 V, Ta = +25°C), Max. 10
µA
(V
CC
= 3.0 V)
• Dual modulus prescaler: 1100 MHz prescaler (64/65, 128/129)
• Serial input 14-bit programmable reference divider: R = 3 to 16,383
• Serial input programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 3 to 2,047
• Software selectable charge pump current
• On-chip phase control for phase comparator
• Operating temperature: Ta = –40 to +85°C
■
PACKAGES
16-pin plastic SSOP
16-pad plastic BCC
(FPT-16P-M05)
(LCC-16P-M04)
Copyright©2000-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2000.2
MB15F07SL
■
PIN ASSIGNMENTS
16-pin SSOP
16-pad BCC
GND
2
OSC
IN
GND
1
fin
1
V
CC1
LD/fout
PS
1
D
O1
1
2
3
4
5
6
7
8
TOP
VIEW
16
15
14
13
12
11
10
9
Clock
Data
LE
fin
2
V
CC2
Xfin
2
PS
2
D
O2
OSC
IN
GND
1
fin
1
V
CC1
LD/fout
PS
1
1
2
3
4
5
6
GND
2
Clock
16
15
14
13
TOP
VIEW
12
11
10
7
8
9
Data
LE
fin
2
V
CC2
Xfin
2
PS
2
D
O1
D
O2
(FPT-16P-M05)
(LCC-16P-M04)
2
MB15F07SL
■
PIN DESCRIPTIONS
Pin no.
SSOP-16 BCC-16
1
2
3
4
5
16
1
2
3
4
Pin
name
GND
2
OSC
IN
GND
1
fin
1
V
CC1
I/O
–
I
–
I
–
Ground for PLL 2 section.
The programmable reference divider input. TCXO should be connected
with a AC coupling capacitor.
Ground for the PLL 1 section.
Prescaler input pin for the PLL 1.
Connection to an external VCO should be via AC coupling.
Power supply voltage input pin for the PLL 1 section.
Lock detect signal output (LD)/phase comparator monitoring
output (fout).
The output signal is selected by LDS bit in a serial data.
LDS bit = “H” ; outputs fout signal
LDS bit = “L” ; outputs LD signal
Power saving mode control for the PLL 1 section. This pin must be set
at “L” during Power-ON. (Open is prohibited.)
PS
1
= “H” ; Normal mode
PS
1
= “L” ; Power saving mode
Charge pump output for the PLL 1 section.
Phase characteristics of the phase detector can be selected via
programming of the FC-bit.
Charge pump output for the PLL 2 section.
Phase characteristics of the phase detector can be selected via
programming of the FC-bit.
Power saving mode control for the PLL 2 section. This pin must be set
at “L” during Power-ON. (Open is prohibited.)
PS
2
= “H” ; Normal mode
PS
2
= “L” ; Power saving mode
Prescaler complementary input for the PLL 2 section.
This pin should be grounded via a capacitor.
Power supply voltage input pin for the PLL 2 section, the shift register and
the oscillator input buffer. When power is OFF, latched data of PLL 2 is lost.
Prescaler input pin for the PLL 2.
Connection to an external VCO should be via AC coupling.
Load enable signal inpunt (with a schmitt trigger input buffer.)
When the LE bit is set “H”, data in the shift register is transferred to the
corresponding latch according to the control bit in the serial data.
Serial data input (with a schmitt trigger input buffer.)
Data is transferred to the corresponding latch (PLL 1-ref counter, PLL 1-
prog. counter, PLL 2-ref. counter, PLL 2-prog. counter) according to the
control bit in the serial data.
Clock input for the 23-bit shift register (with a schmitt trigger input buffer.)
One bit of data is shifted into the shift register on a rising edge of the clock.
Descriptions
6
5
LD/fout
O
7
6
PS
1
I
8
7
Do
1
O
9
8
Do
2
O
10
9
PS
2
I
11
12
13
14
10
11
12
13
Xfin
2
V
CC2
fin
2
LE
I
–
I
I
15
14
Data
I
16
15
Clock
I
3
MB15F07SL
■
BLOCK DIAGRAM
V
CC1
GND
1
5 (4) 3 (2)
PS
1
7
(6)
Intermittent
mode control
(PLL 1)
3-bit latch
LDS SW
1
FC
1
7-bit latch
Binary 7-bit
swallow counter
(PLL 1)
11-bit latch
Binary 11-bit
programmable
counter (PLL 1)
fp
1
Phase
comp.
(PLL 1)
Charge
Current
pump
Switch
(PLL 1)
8 Do
1
(7)
fin
1
4
(3)
Prescaler
(PLL 1)
64/65, 128/129
Lock
Det.
(
PLL 1
)
2-bit latch
14-bit latch
Binary 14-bit
programmable ref.
counter (PLL 1)
1-bit latch
C/P setting
current CP
LD
1
T1
T2
fr
1
OSC
IN
2
(1)
fr
2
OR
T1
T2
Binary 14-bit
programmable ref.
counter (PLL 2)
C/P setting
current CP
AND
Selector
2-bit latch
14-bit latch
1-bit latch
LD
fr
1
fr
2
fp
1
fp
2
Lock
Det.
(
PLL 2
)
6 LD/
(5) fout
(12)
fin
2
13
Xfin
2
11
(10)
Prescaler
(PLL 2)
64/65, 128/129
PS
2
10
(9)
Intermittent
mode control
(PLL 2)
LDS
SW
2
FC
2
Binary 7-bit
swallow counter
(PLL 2)
Binary 11-bit
programmable
counter (PLL 2)
Phase
comp.
(
PLL 2
)
fp
2
Charge
Current
pump
switch
(
PLL 2
)
9 Do
2
(8)
3-bit latch
7-bit latch
11-bit latch
LE 14
(13)
(14)
Data 15
Clock 16
(15)
Schmitt
circuit
Latch selector
Schmitt
circuit
Schmitt
circuit
C C
N N
1 2
23-bit shift register
12 (11) 1 (16)
V
CC2
GND
2
O : SSOP
( ) : BCC
4
MB15F07SL
■
ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Input voltage
Output voltage
Storage temperature
Symbol
V
CC
V
I
V
O
Tstg
Rating
Min.
–0.5
–0.5
GND
–55
Max.
+4.0
V
CC
+0.5
V
CC
+125
Unit
V
V
V
°C
Remark
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■
RECOMMENDED OPERATING CONDITIONS
Parameter
Power supply voltage
Input voltage
Operating temperature
Symbol
V
CC
V
I
Ta
Value
Min.
2.4
GND
–40
Typ.
3.0
–
–
Max.
3.6
V
CC
+85
Unit
V
V
°C
Remark
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
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