JANSR2N7275
Formerly FRL230R4
January 2002
5A, 200V, 0.500 Ohm, Rad Hard,
N-Channel Power MOSFET
Description
The Fairchild Corporation has designed a series of SEC-
OND GENERATION hardened power MOSFETs of both N-
Channel and P-Channel enhancement types with ratings
from 100V to 500V, 1A to 60A, and on resistance as low as
25mΩ. Total dose hardness is offered at 100K RAD (Si) and
1000K RAD (Si) with neutron hardness ranging from 1E13
for 500V product to 1E14 for 100V product. Dose rate hard-
ness (GAMMA DOT) exists for rates to 1E9 without current
limiting and 2E12 with current limiting.
This MOSFET is an enhancement-mode silicon-gate power
field effect transistor of the vertical DMOS (VDMOS) struc-
ture. It is specially designed and processed to exhibit mini-
mal characteristic changes to total dose (GAMMA) and
neutron (n
o
) exposures. Design and processing efforts are
also directed to enhance survival to dose rate (GAMMA
DOT) exposure.
Also available at other radiation and screening levels. See us
on
the
web,
Fairchild’s
home
page:
http://www.fairchildsemi.com. Contact your local Fairchild
Sales Office for additional information.
Features
• 5A, 200V, r
DS(ON)
= 0.500
Ω
• Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BV
DSS
- Typically Survives 2E12 if Current Limited to I
DM
• Photo Current
- 3nA Per-RAD(Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications
for 1E13 Neutrons/cm
2
- Usable to 1E14 Neutrons/cm
2
Ordering Information
PART NUMBER
JANSR2N7275
PACKAGE
TO-205AF
BRAND
JANSR2N7275
Die family TA17632.
MIL-PRF-19500/604.
Symbol
D
G
S
Packaging
TO-205AF
D
G
S
©2002 Fairchild Semiconductor Corporation
JANSR2N7275 Rev. B
JANSR2N7275
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
JANSR2N7275
200
200
5
3
15
±
20
25
10
0.20
15
5
15
-55 to 150
300
1.0
UNITS
V
V
A
A
A
V
W
W
W/
o
C
A
A
A
o
C
o
C
g
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
Maximum Power Dissipation
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100
µ
H, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . I
AS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
S
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
(Distance >0.063in (1.6mm) from Case, 10s Max)
Weight (Typical) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
TEST CONDITIONS
I
D
= 1mA, V
GS
= 0V
V
GS
= V
DS
,
I
D
= 1mA
T
C
= -55
o
C
T
C
= 25
o
C
T
C
= 125
o
C
MIN
200
-
2.0
1.0
-
-
-
-
-
T
C
= 25
o
C
T
C
= 125
o
C
-
-
-
-
-
-
V
GS
= 0V to 20V
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 100V,
I
D
= 5A
-
-
-
-
-
-
-
TYP
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX
-
5.0
4.0
-
25
250
100
200
2.63
0.500
1.100
35
140
172
80
120
60
3
12
29
5.0
175
UNITS
V
V
V
V
µ
A
µ
A
nA
nA
V
Ω
Ω
ns
ns
ns
ns
nC
nC
nC
nC
nC
o
C/W
o
C/W
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 160V,
V
GS
= 0V
V
GS
=
±
20V
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
Gate to Source Leakage Current
I
GSS
Drain to Source On-State Voltage
Drain to Source On Resistance
V
DS(ON)
r
DS(ON)
V
GS
= 10V, I
D
= 5A
I
D
= 3A,
V
GS
= 10V
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge (Not on Slash Sheet)
Gate Charge at 10V
Threshold Gate Charge (Not on Slash Sheet)
Gate Charge Source
Gate Charge Drain
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
R
θ
JC
R
θ
JA
V
DD
= 100V, I
D
= 5A,
R
L
= 20
Ω
, V
GS
= 10V,
R
GS
= 25
Ω
©2002 Fairchild Semiconductor Corporation
JANSR2N7275 Rev. B
JANSR2N7275
Source to Drain Diode Specifications
PARAMETER
Forward Voltage
Reverse Recovery Time
SYMBOL
V
SD
t
rr
I
SD
= 5A
I
SD
= 5A, dI
SD
/dt = 100A/
µ
s
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
(Note 3)
(Note 3)
(Notes 2, 3)
(Note 3)
(Notes 1, 3)
(Notes 1, 3)
BV
DSS
V
GS(TH)
I
GSS
I
DSS
V
DS(ON)
r
DS(ON)12
TEST CONDITIONS
V
GS
= 0, I
D
= 1mA
V
GS
= V
DS
, I
D
= 1mA
V
GS
=
±20V,
V
DS
= 0V
V
GS
= 0, V
DS
= 160V
V
GS
= 10V, I
D
= 5A
V
GS
= 10V, I
D
= 3A
MIN
200
2.0
-
-
-
-
MAX
-
4.0
100
25
2.63
0.500
UNITS
V
V
nA
µA
V
Ω
TEST CONDITIONS
MIN
0.6
-
TYP
-
-
MAX
1.8
600
UNITS
V
ns
Electrical Specifications up to 100K RAD
PARAMETER
Drain to Source Breakdown Volts
Gate to Source Threshold Volts
Gate to Body Leakage
Zero Gate Leakage
Drain to Source On-State Volts
Drain to Source On Resistance
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both V
GS
= 10V, V
DS
= 0V and V
GS
= 0V, V
DS
= 80% BV
DSS
.
Typical Performance Curves
7
6
Unless Otherwise Specified
50
T
C
= 25
o
C
I
D
, DRAIN CURRENT (A)
5
I
D
, DRAIN (A)
4
3
2
1
0
-50
10
100µs
1ms
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
0.1
1
10
100
600
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10ms
100ms
0
50
100
150
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 2. FORWARD BIAS SAFE OPERATING AREA
©2002 Fairchild Semiconductor Corporation
JANSR2N7275 Rev. B
JANSR2N7275
Typical Performance Curves
Unless Otherwise Specified
(Continued)
NORMALIZED
THERMAL IMPEDANCE (Z
θ
JC
)
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
+ T
C
10
-4
10
-3
10
-2
10
-1
P
DM
0.01
t
1
t
2
10
0
10
1
0.001
10
-5
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN I
AS
IS REACHED
V
DS
L
+
CURRENT I
TRANSFORMER
AS
BV
DSS
t
P
I
AS
+
V
DD
V
DS
V
DD
-
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
≤
20V
50Ω
-
DUT
50V-150V
50Ω
t
AV
0V
t
P
FIGURE 4. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 5. UNCLAMPED ENERGY WAVEFORMS
©2002 Fairchild Semiconductor Corporation
JANSR2N7275 Rev. B
JANSR2N7275
Test Circuits and Waveforms
V
DD
t
ON
t
d(ON)
t
OFF
t
d(OFF)
t
r
t
f
90%
R
L
V
DS
V
GS
= 10V
DUT
0V
R
GS
V
DS
90%
10%
10%
90%
V
GS
10%
50%
PULSE WIDTH
50%
FIGURE 6. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 7. RESISTIVE SWITCHING WAVEFORMS
10V
Q
g
Q
gs
V
G
Q
gd
CHARGE
FIGURE 8. BASIC GATE CHARGE WAVEFORM
©2002 Fairchild Semiconductor Corporation
JANSR2N7275 Rev. B
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