D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
Low Power, High Speed
Rail-to-Rail Input/Output Amplifier
AD8029/AD8030/AD8040
FEATURES
Low power
1.3 mA supply current/amplifier
High speed
125 MHz, –3 dB bandwidth (G = +1)
60 V/µs slew rate
80 ns settling time to 0.1%
Rail-to-rail input and output
No phase reversal, inputs 200 mV beyond rails
Wide supply range: 2.7 V to 12 V
Offset voltage: 6 mV max
Low input bias current
+0.7 µA to –1.5 µA
Small packaging
SOIC-8, SC70-6, SOT23-8, SOIC-14, TSSOP-14
NC
1
–IN
2
+IN
3
–V
S 4
CONNECTION DIAGRAMS
8
7
6
5
DISABLE
+V
S
V
OUT
NC
03679-A-004
V
OUT 1
–V
S 2
+IN
3
6
+V
S
+
–
5
DISABLE
03679-A-002
NC = NO CONNECT
4
–IN
Figure 1. SOIC-8 (R)
Figure 2. SC70-6 (KS)
V
OUT
1
1
–IN 1
2
+IN 1
3
V
OUT
1
1
–IN 1
2
+IN 1
3
–V
S 4
8
7
6
5
14
V
OUT
4
13
–IN 4
12
+IN 4
11
–V
S
10
+IN 3
03679-A-001
+V
S
+V
OUT
2
03679-A-003
+V
S 4
+IN 2
5
–IN 2
6
V
OUT
2
7
APPLICATIONS
Battery-powered instrumentation
Filters
A-to-D drivers
Buffering
–IN 2
+IN 2
9
8
–IN 3
V
OUT
3
Figure 3. SOIC-8(R) and
SOT23-8 (RJ)
Figure 4. SOIC-14 (R) and
TSSOP-14 (RU)
GENERAL DESCRIPTION
The AD8029 (single), AD8030 (dual), and AD8040 (quad) are
rail-to-rail input and output high speed amplifiers with a
quiescent current of only 1.3 mA per amplifier. Despite their
low power consumption, the amplifiers provide excellent
performance with 125 MHz small signal bandwidth and
60 V/µs slew rate. ADI’s proprietary XFCB process enables high
speed and high performance on low power.
This family of amplifiers exhibits true single-supply operation
with rail-to-rail input and output performance for supply
voltages ranging from 2.7 V to 12 V. The input voltage range
extends 200 mV beyond each rail without phase reversal. The
dynamic range of the output extends to within 40 mV of each
rail.
VOLTAGE (V)
powered systems with large bandwidth requirements to high
speed systems where component density requires lower power
dissipation.
The AD8029/AD8030 are the only low power, rail-to-rail input
and output high speed amplifiers available in SOT23 and SC70
micro packages. The amplifiers are rated over the extended
industrial temperature range, –40°C to +125°C.
5.0
INPUT
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
G = +1
0.5 V
S
= +5V
R
L
= 1kΩ TIED TO MIDSUPPLY
0
TIME (µs)
OUTPUT
The AD8029/AD8030/AD8040 provide excellent signal quality
with minimal power dissipation. At G = +1, SFDR is –72 dBc at
1 MHz and settling time to 0.1% is only 80 ns. Low distortion
and fast settling performance make these amplifiers suitable
drivers for single-supply A/D converters.
The versatility of the AD8029/AD8030/AD8040 allows the user
to operate the amplifiers on a wide range of supplies while
consuming less than 6.5 mW of power. These features extend
the operation time in applications ranging from battery-
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
1µs/DIV
03679-A-010
Figure 5. Rail-to-Rail Response
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2003 Analog Devices, Inc. All rights reserved.
AD8029/AD8030/AD8040
TABLE OF CONTENTS
Specifications..................................................................................... 3
Specifications with ±5 V Supply ................................................. 3
Specifications with +5 V Supply ................................................. 4
Specifications with +3 V Supply ................................................. 5
Absolute Maximum Ratings............................................................ 6
Maximum Power Dissipation ..................................................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 15
Input Stage................................................................................... 15
Output Stage................................................................................ 15
Applications..................................................................................... 16
Wideband Operation ................................................................. 16
Output Loading sensitivity........................................................ 16
Disable Pin .................................................................................. 17
Circuit Considerations .............................................................. 18
Design Tools and Technical Support ....................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide............................................................................... 20
ESD Caution................................................................................ 20
REVISION HISTORY
Revision A
11/03—Data Sheet Changed from Rev. 0 to Rev. A
Change
Page
Added AD8040 part .......................................................Universal
Change to Figure 5 ....................................................................... 1
Changes to Specifications ............................................................ 3
Changes to Figures 10–12............................................................ 7
Change to Figure 14 ..................................................................... 8
Changes to Figures 20 and 21 ..................................................... 9
Inserted new Figure 36............................................................... 11
Change to Figure 40 ................................................................... 12
Inserted new Figure 41............................................................... 12
Added Output Loading Sensitivity section ............................. 16
Changes to Table 5...................................................................... 17
Changes to Power Supply Bypassing section .......................... 18
Changes to Ordering Guide ...................................................... 20
Rev. A | Page 2 of 20
AD8029/AD8030/AD8040
SPECIFICATIONS
SPECIFICATIONS WITH ±5 V SUPPLY
Table 1. V
S
= ±5 V @ T
A
= 25°C, G = +1, R
L
= 1 kΩ to ground, unless otherwise noted. All specifications are per amplifier.
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/DISTORTION PERFORMANCE
Spurious Free Dynamic Range (SFDR)
Input Voltage Noise
Input Current Noise
Crosstalk (AD8030/AD8040)
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
1
Conditions
G = +1, V
O
= 0.1 V p-p
G = +1, V
O
= 2 V p-p
G = +2, V
O
= 0.1 V p-p
G = +1, V
O
= 2 V Step
G = –1, V
O
= 2 V Step
G = +2, V
O
= 2 V Step
f
C
= 1 MHz, V
O
= 2 V p-p
f
C
= 5 MHz, V
O
= 2 V p-p
f = 100 kHz
f = 100 kHz
f = 5 MHz, V
IN
= 2 V p-p
PNP Active, V
CM
= 0 V
NPN Active, V
CM
= 4.5 V
T
MIN
to T
MAX
NPN Active, V
CM
= 4.5 V
T
MIN
to T
MAX
PNP Active, V
CM
= 0 V
T
MIN
to T
MAX
V
o
= ±4.0 V
Min
80
14
Typ
125
19
6
62
63
80
–74
–56
16.5
1.1
Max
Unit
MHz
MHz
MHz
V/µs
V/µs
ns
dBc
dBc
nV/√Hz
pA/√Hz
dB
–79
1.6
2
30
0.7
1
–1.7
2
±0.1
74
6
2
–5.2 to +5.2
90
–V
S
+ 0.8
–6.5
–V
S
+ 1.2
0.2
5
6
1.3
–2.8
±0.9
mV
mV
µV/°C
µA
µA
µA
µA
µA
dB
MΩ
pF
V
dB
V
µA
V
µA
ns
ns
Input Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
DISABLE PIN (AD8029)
DISABLE Low Voltage
DISABLE Low Current
DISABLE High Voltage
DISABLE High Current
Turn-Off Time
Turn-On Time
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
(Rising/Falling Edge)
Output Voltage Swing
Short-Circuit Current
Off Isolation (AD8029)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current/Amplifier
Quiescent Current (Disabled)
Power Supply Rejection Ratio
1
65
V
CM
= –4.5 V to +3 V, R
L
= 10 kΩ
80
50% of DISABLE to <10% of Final V
O
,
V
IN
= –1 V, G = –1
50% of DISABLE to <10% of Final V
O
,
V
IN
= –1 V, G = –1
150
85
V
IN
= +6 V to –6 V, G = –1
R
L
= 1 kΩ
R
L
= 10 kΩ
Sinking and Sourcing
V
IN
= 0.1 V p-p, f = 1 MHz, DISABLE = Low
30% Overshoot
55/45
–V
S
+ 0.22
–V
S
+ 0.05
170/160
–55
20
2.7
1.4
12
1.5
200
+V
S
– 0.22
+V
S
– 0.05
ns
V
V
mA
dB
pF
V
mA
µA
dB
DISABLE = Low
V
s
± 1 V
73
150
80
Plus, +, (or no sign) indicates current into pin; minus (–) indicates current out of pin.
Rev. A | Page 3 of 20
AD8029/AD8030/AD8040
SPECIFICATIONS WITH +5 V SUPPLY
Table 2. V
S
= 5 V @ T
A
= 25°C, G = +1, R
L
= 1 kΩ to midsupply, unless otherwise noted. All specifications are per amplifier.
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/DISTORTION PERFORMANCE
Spurious Free Dynamic Range (SFDR)
Input Voltage Noise
Input Current Noise
Crosstalk (AD8030/AD8040)
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
1
Conditions
G = +1, V
O
= 0.1 V p-p
G = +1, V
O
= 2 V p-p
G = +2, V
O
= 0.1 V p-p
G = +1, V
O
= 2 V Step
G = –1, V
O
= 2 V Step
G = +2, V
O
= 2 V Step
f
C
= 1 MHz, V
O
= 2 V p-p
f
C
= 5 MHz, V
O
= 2 V p-p
f = 100 kHz
f = 100 kHz
f = 5 MHz, V
IN
= 2 V p-p
PNP Active, V
CM
= 2.5 V
NPN Active, V
CM
= 4.5 V
T
MIN
to T
MAX
NPN Active, V
CM
= 4.5 V
T
MIN
to T
MAX
PNP Active, V
CM
= 2.5 V
T
MIN
to T
MAX
V
o
= 1 V to 4 V
65
Min
80
13
Typ
120
18
6
55
60
82
–73
–55
16.5
1.1
-79
1.4
1.8
25
0.8
1
–1.8
2
±0.1
74
6
2
–0.2 to +5.2
90
–V
S
+ 0.8
–6.5
–V
S
+ 1.2
0.2
155
90
5
6
1.2
–2.8
±0.9
Max
Unit
MHz
MHz
MHz
V/µs
V/µs
ns
dBc
dBc
nV/√Hz
pA/√Hz
dB
mV
mV
µV/°C
µA
µA
µA
µA
µA
dB
MΩ
pF
V
dB
V
µA
V
µA
ns
ns
Input Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
DISABLE PIN (AD8029)
DISABLE Low Voltage
DISABLE Low Current
DISABLE High Voltage
DISABLE High Current
Turn-Off Time
Turn-On Time
OUTPUT CHARACTERISTICS
Overdrive Recovery Time
(Rising/Falling Edge)
Output Voltage Swing
Short-Circuit Current
Off Isolation (AD8029)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current/Amplifier
Quiescent Current (Disabled)
Power Supply Rejection Ratio
1
V
CM
= 0.25 V to 2 V, R
L
= 10 kΩ
80
50% of DISABLE to <10% of Final V
O
,
V
IN
= –1 V, G = –1
50% of DISABLE to <10% of Final V
O
,
V
IN
= –1 V, G = –1
V
IN
= –1 V to +6 V, G = –1
R
L
= 1 kΩ
R
L
= 10 kΩ
Sinking and Sourcing
V
in
= 0.1 V p-p, f = 1 MHz, DISABLE = Low
30% Overshoot
45/50
–V
S
+ 0.17
–V
S
+ 0.04
95/60
–55
15
2.7
12
1.5
200
+V
S
– 0.17
+V
S
– 0.04
ns
V
V
mA
dB
pF
V
mA
µA
dB
DISABLE = Low
V
S
± 1 V
73
1.3
140
80
Plus, +, (or no sign) indicates current into pin; minus (–) indicates current out of pin.
Rev. A | Page 4 of 20
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
