Freescale Semiconductor
Technical Data
Document Number: MC33991
Rev. 2.0, 11/2006
Gauge Driver Integrated Circuit
This 33991 is a single packaged, Serial Peripheral Interface (SPI)
controlled, dual stepper motor gauge driver Integrated Circuit (IC).
This monolithic IC consists of four dual output H-Bridge coil drivers
and the associated control logic. Each pair of H-Bridge drivers is used
to automatically control the speed, direction and magnitude of current
through the two coils of a two-phase instrumentation stepper motor,
similar to an MMT licensed AFIC 6405.
This device is ideal for use in automotive instrumentation systems
requiring distributed and flexible stepper motor gauge driving. The
device also eases the transition to stepper motors from air core
motors by emulating the air core pointer movement with little
additional processor bandwidth utilization.
The device has many attractive features including:
33991
GAUGE DRIVER INTEGRATED CIRCUIT
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Features
• MMT-Licensed Two-Phase Stepper Motor Compatible
• Minimal Processor Overhead Required
• Fully Integrated Pointer Movement and Position State Machine
with Air Core Movement Emulation
• 4096 Possible Steady State Pointer Positions
• 340° Maximum Pointer Sweep
• Linear 4500°
2
• Maximum Pointer Velocity of 400°
• Analog Microstepping (12 Steps/Degree of Pointer Movement)
• Pointer Calibration and Return to Zero
• SPI Controlled 16-Bit Word
• Calibratable Internal Clock
• Low Sleep Mode Current
• Pb-Free Packaging Designated by Suffix Code EG
ORDERING INFORMATION
Device
MC33991DW/R2
MCZ33991EG/R2
Temperature
Range (T
A
)
-40 to 125°C
Package
SOICW
VPWR
33991
VPWR
VDD
RT
RS
CS
SCLK
SI
SO
SIN1+
SIN1-
COS1+
COS1-
SIN2+
SIN2-
COS2+
COS2-
GND
Motor 1
5.0 V
Regulator
MCU
Motor 2
Figure 1. 33991 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
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DW SUFFIX
EG SUFFIX (PB-FREE)
98ASB42344B
24-PIN SOICW
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VPWR
Internal
Reference
VDD
COS0
COS0+
COS0-
CS
SCLK
SO
SI
SIN0
SIN0+
SIN0-
COS1
COS1+
COS1-
RTZ
RTZ
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RST
Logic
Under
&
Over
Voltage
Detect
ILIM
H-BRIDGE
&
CONTROL
SIN1+
SIN1-
Over Temp
SIN1
Oscillator
GND
Figure 2. 33991 Simplified Internal Block Diagram
33991
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
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SPI
PIN CONNECTIONS
PIN CONNECTIONS
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COS0+
COS0
SIN0+
SIN0
GND
GND
GND
GND
CS
SCLK
SO
SI
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
COS1+
COS1-
SIN1+
SIN1-
GND
GND
GND
GND
V
PWR
RST
V
DD
RTZ
Table 1. 33991 Pin Definitions
Pin Number
1
Pin Name
COS0+
Definitions
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
Ground. These pins serve as the ground for the source of the low-side output transistors as well as the
logic portion of the device. They also help dissipate heat from the device.
Chip Select.
This pin is connected to a chip select output of a LSI IC. This IC controls which device is
addressed by pulling the CS pin of the desire device low, enabling the SPI communication with the device,
while other devices on the serial link keep their serial outputs tri-stated. This input has an internal active
pull-up, requiring CMOS logic levels. This pin is also used to calibrate the internal clock.
Serial Clock.
This pin is connected to the SCLK pin of the master device and acts as a bit clock for the
SPI port. It transitions on time per bit transferred at an operating frequency, fSPI, defined in the Coil Output
Timing Table. It is idle between command transfers. The pin is 50 percent duty cycle, with CMOS logic
levels. This signal is used to shift data to and from the device.
Serial Output. This pin is connected to the SPI Serial Data Input pin of the master device, or to the SI pin
of the next device in a daisy chain. This output will remain tri-stated unless the device is selected by a low
CS signal. The output signal generated will have CMOS logic levels and the output will transition on the
rising edges of SCLK. The serial output data provides status feedback and fault information for each output
and is returned MSB first when the device is addressed.
Serial Input.
This pin is connected to the SPI Serial Data Output pin of the master device from which it
receives output command data. This input has an internal active pull down requiring CMOS logic levels.
The serial data transmitted on this line is a 16-bit control command sent MSB first, controlling the gauge
functions. The master ensures data is available on the falling edge of SCLK.
Multiplexed Output. This multiplexed output pin of the non-driven coil during an RTZ event.
Voltage.
This SPI and logic power supply input will work with 5.0 V supplies.
2
COS0-
3
SIN0+
4
SIN0-
5-8
9
GND
CS
10
SCLK
11
SO
12
SI
13
14
RTZ
V
DD
33991
Analog Integrated Circuit Device Data
Freescale Semiconductor
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PIN CONNECTIONS
Table 1. 33991 Pin Definitions (continued)
Pin Number
15
Pin Name
RST
Definitions
Reset.
If the master decides to reset the device, or place it into a sleep state, the RST pin is driven to a
logic 0. A logic 0 on the RST pin will force all internal logic to the known default state. This input has an
internal active pull-up.
Battery Voltage.
Power supply.
Ground. These pins serve as the ground for the source of the low-side output transistors as well as the
logic portion of the device. They also help dissipate heat from the device.
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
16
17 - 20
21
V
PWR
GND
SIN1-
22
SIN1+
Archive Information
24
COS1+
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
33991
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
Archive Information
23
COS1-
H-Bridge Output.
This is the output pin of a half bridge, designed to source or sink current. The H-Bridge
pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant
operation.
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. 33991 Maximum Ratings
(All voltages are with respect to ground unless otherwise noted)
Rating
Power Supply Voltage
Steady State
Input Pin Voltage
(1)
SIN+/- COS +/- Continuous Per Output Current
(2)
Storage Temperature
V
PWR(SUS)
V
IN
I
OUTMAX
T
STG
T
JUNC
Ambient
Junction to Lead
ESD Voltage
(3)
Human Body Model
Machine Model
Peak Package Reflow Temperature During Reflow
(4), (5)
V
ESD1
V
ESD2
T
PPRT
±2000
±200
Note 5
V
V
°C
θ
JA
θ
JL
-0.3 to 41
-0.3 to 7.0
40
-55 to 150
-40 to 150
60
20
V
mA
°C
°C
°C/W
°C/W
Symbol
Value
Limit
V
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Operating Junction Temperature
Thermal Resistance (C/W)
Notes
1. Exceeding voltage limits on Input pins may cause permanent damage to the device.
2. Output continuous output rating so long as maximum junction temperature is not exceeded. Operation at 125°C ambient temperature
will require maximum output current computation using package thermal resistances
3. VESD1 testing is performed in accordance with the Human Body Model (Czap = 100pF, Rzap = 1500
Ω),
All pins are capable of Human
Body Model RSP voltages of ±2000 V with one exception. The SO pin is capable of ± 1900 V, VESD2 testing is performed in accordance
with the Machine Model (Czap = 200pF, Rzap = 0
Ω)
4. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
5. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
33991
Analog Integrated Circuit Device Data
Freescale Semiconductor
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