IDTQS74FCT253AT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
HIGH-SPEED CMOS
DUAL 4-INPUT
MULTIPLEXER
FEATURES:
•
•
•
•
•
•
•
IDTQS74FCT253AT
DESCRIPTION:
CMOS power levels: <7.5mW static
Undershoot clamp diodes on all inputs
True TTL input and output compatibility
Ground bounce controlled outputs
Reduced output swing of 0 to 3.5V
I
OL
= 48mA
Available in SOIC, QSOP, and S1 packages
The IDTQS74FCT253AT is a high-speed CMOS TTL-compatible dual
4-input multiplexer with 3-state outputs. All inputs have clamp diodes for
undershoot noise suppression. All outputs have ground bounce suppres-
sion. Outputs will not load an active bus when Vcc is removed from the
device.
FUNCTIONAL BLOCK DIAGRAM
EB
EA
S1
S0
I0A
I1A
I2A
I3A
I0B
I1B
I2B
I3B
YA
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
YB
INDUSTRIAL TEMPERATURE RANGE
1
MARCH 2001
DSC-5873/1
© 2001 Integrated Device Technology, Inc.
IDTQS74FCT253AT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
Description
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current Max Current Sink/Pin
Input Diode Current, V
IN
< 0
DC Output Current, V
OUT
< 0
Max
–0.5 to +7
–65 to +150
+120
-20
-50
Unit
V
°C
mA
mA
mA
EA
S
1
I
3A
I
2A
I
1A
I
0A
YA
GND
1
2
3
4
5
6
7
8
SOIC/ QSOP/ S1
TOP VIEW
16
15
14
13
12
11
10
9
V
CC
EB
S
0
I
3B
I
2B
I
1B
I
0B
YB
I
OUT
I
IK
I
OK
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4
8
Max.
—
—
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
Ix
Sx
EA, EB
YA, YB
I/O
I
I
I
0
Data In
Select
Enable
Data Out
Description
FUNCTION TABLE
(1)
Enable
EA
H
X
L
L
L
L
EB
X
H
L
L
L
L
X
X
L
L
H
H
Select
S
0
S
1
X
X
L
H
L
H
Outputs
YA
Z
X
I
0
A
I
1
A
I
2
A
I
3
A
YB
Z
Z
I
0
B
I
1
B
I
2
B
I
3
B
Function
Disable A
Disable B
S
1
- 0 = 0
S
1
- 0 = 1
S
1
- 0 = 2
S
1
- 0 = 3
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2
IDTQS74FCT253AT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
∆V
T
I
IH
I
IL
I
OZ
I
OS
V
IC
V
OH
V
OL
Parameter
Input HIGH Level
Input LOW Level
Input Hysteresis
Input HIGH Current
Input LOW Current
Off-State Output Current (Hi-Z)
Short Circuit Current
Input Clamp Voltage
Output HIGH Voltage
Output LOW Voltage
V
CC
= Max.
V
CC
= Max., V
OUT
= GND
(2)
V
CC
= Min., I
IN
= –18mA, T
A
= 25°C
V
CC
= Min.
V
CC
= Min.
I
OH
= –15mA
I
OL
= 12mA
0
≤
V
IN
≤
V
CC
—
-60
—
2.4
—
—
—
–0.7
—
—
±5
—
–1.2
—
0.5
µA
mA
V
V
V
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
TLH
- V
THL
for all inputs
V
CC
= Max.
0
≤
V
IN
≤
V
CC
Min.
2
—
—
—
Typ.
(2)
—
—
0.2
—
Max.
—
0.8
—
±5
Unit
V
V
V
µA
NOTES:
1. Typical values are at V
CC
= 5.0V, +25°C ambient.
2. This parameter is guaranteed but not tested
POWER SUPPLY CHARACTERISTICS
Symbol
I
CC
Parameter
Quiescent Power Supply Current
Test Conditions
(1)
V
CC
= Max.
freq = 0
0V
≤
V
IN
≤
0.2V or
V
CC
- 0.2V
≤
V
IN
≤
V
CC
∆I
CC
Supply Current per Input TTL Inputs HIGH
V
CC
= Max.
V
IN
= 3.4V
(2)
freq = 0
V
CC
= Max.
Outputs Open and Enabled
One Bit Toggling
50% Duty Cycle
Other inputs at GND or V
CC(3,4)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under DC Electrical Characteristics.
2. Per TTL driven input (V
IN
= 3.4V).
3. For flip-flops, I
CCD
is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption
only and does not include power to drive load capacitance or tester capacitance.
4. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
Min.
—
Max.
1.5
Unit
mA
—
2
mA
I
CCD
Supply Current per Input per MHz
—
0.25
mA/
MHz
3
IDTQS74FCT253AT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
Symbol
t
IY
Parameter
Propagation Delay
Ix to Y
t
SY
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
Sx to Y
Output Enable Time
E
to Y
Output Disable Time
E
to Y
1.5
6
ns
Min.
1.5
Max.
5.2
Unit
ns
1.5
1.5
6.6
6
ns
ns
NOTES:
1. C
LOAD
= 50pF, R
LOAD
= 500Ω unless otherwise noted.
2. Minimums guaranteed but not tested.
3. This parameter is guaranteed by design but not tested.
4
IDTQS74FCT253AT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500Ω
Pulse
Generator
V
IN
D.U.T.
50pF
R
T
C
L
500Ω
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
FCTL link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
FCTL link
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
FCTL link
1.5V
1.5V
t
SU
t
H
Pulse Width
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
FCTL link
DISABLE
3V
1.5V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
t
PHZ
0.3V
1.5V
0V
t
PLZ
0V
3.5V
0.3V
V
OL
V
OH
0V
FCTL link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
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