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ON Semiconductort
Low-Voltage CMOS
Octal D-Type Flip-Flop
With 5 V–Tolerant Inputs and Outputs
(3–State, Non–Inverting)
The MC74LCX374 is a high performance, non–inverting octal
D–type flip–flop operating from a 2.3 to 3.6 V supply. High
impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
MC74LCX374 inputs to be safely driven from 5 V devices.
The MC74LCX374 consists of 8 edge–triggered flip–flops with
individual D–type inputs and 3–state true outputs. The buffered clock
and buffered Output Enable (OE) are common to all flip–flops. The
eight flip–flops will store the state of individual D inputs that meet the
setup and hold time requirements on the LOW–to–HIGH Clock (CP)
transition. With the OE LOW, the contents of the eight flip–flops are
available at the outputs. When the OE is HIGH, the outputs go to the
high impedance state. The OE input level does not affect the operation
of the flip–flops.
MC74LCX374
LOW–VOLTAGE CMOS
OCTAL D–TYPE FLIP–FLOP
20
1
DT SUFFIX
PLASTIC TSSOP
CASE 948E
•
•
•
•
•
•
•
•
Designed for 2.3 to 3.6 V VCC Operation
5 V Tolerant – Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10
µA)
Substantially Reduces System Power Requirements
•
Latchup Performance Exceeds 500 mA
•
ESD Performance: Human Body Model >2000 V; Machine Model
>200 V
20
1
DW SUFFIX
PLASTIC SOIC
CASE 751D
20
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967
PIN NAMES
Pins
OE
CP
D0–D7
O0–O7
Function
Output Enable Input
Clock Pulse Input
Data Inputs
3–State Outputs
©
Semiconductor Components Industries, LLC, 2001
689
May, 2001 – Rev. 6
Publication Order Number:
MC74LCX374/D
MC74LCX374
VCC
20
O7
19
D7
18
D6
17
O6
16
O5
15
D5
14
D4
13
O4
12
CP
11
OE
CP
1
11
3
nCP
D
nCP
D
nCP
D
nCP
D
nCP
D
nCP
D
nCP
D
nCP
D
Q
2
O0
D0
1
OE
2
O0
3
D0
4
D1
5
O1
6
O2
7
D2
8
D3
9
O3
10
GND
D1
4
Q
5
O1
Figure 1. Pinout: 20–Lead
(Top View)
D2
7
Q
6
O2
D3
8
Q
9
O3
D4
13
Q
12
O4
D5
14
Q
15
O5
D6
17
Q
16
O6
D7
18
Q
19
O7
Figure 2. LOGIC DIAGRAM
TRUTH TABLE
INPUTS
OE
L
L
L
H
H
H
H
h
L
l
NC
X
Z
↑
↑
=
=
=
=
=
=
=
=
=
CP
↑
↑
↑
↑
↑
↑
Dn
l
h
X
X
l
h
OUTPUTS
On
L
H
NC
Z
Z
Z
OPERATING MODE
Load and Read Register
Hold and Read Register
Hold and Disable Outputs
Load Internal Register and Disable Outputs
High Voltage Level
High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
Low Voltage Level
Low Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
No Change, State Prior to Low–to–High Clock Transition
High or Low Voltage Level and Transitions are Acceptable
High Impedance State
Low–to–High Transition
Not a Low–to–High Transition; For ICC Reasons, DO NOT FLOAT Inputs
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690
MC74LCX374
MAXIMUM RATINGS
Symbol
VCC
VI
VO
Parameter
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Value
–0.5 to +7.0
–0.5
≤
VI
≤
+7.0
–0.5
≤
VO
≤
+7.0
–0.5
≤
VO
≤
VCC + 0.5
IIK
IOK
DC Input Diode Current
DC Output Diode Current
–50
–50
+50
IO
ICC
IGND
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
±50
±100
±100
Output in 3–State
Note 1.
VI < GND
VO < GND
VO > VCC
Condition
Unit
V
V
V
V
mA
mA
mA
mA
mA
mA
TSTG
Storage Temperature Range
–65 to +150
°C
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VI
VO
IOH
IOL
IOH
IOL
TA
∆t/∆V
Supply Voltage
Input Voltage
Output Voltage
(HIGH or LOW State)
(3–State)
Parameter
Operating
Data Retention Only
Min
2.0
1.5
0
0
0
Typ
3.3
3.3
Max
3.6
3.6
5.5
VCC
5.5
–24
24
–12
12
–40
0
+85
10
Unit
V
V
V
mA
mA
mA
mA
°C
ns/V
HIGH Level Output Current, VCC = 3.0 V – 3.6 V
LOW Level Output Current, VCC = 3.0 V – 3.6 V
HIGH Level Output Current, VCC = 2.7 V – 3.0 V
LOW Level Output Current, VCC = 2.7 V – 3.0 V
Operating Free–Air Temperature
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
DC ELECTRICAL CHARACTERISTICS
TA = –40°C to +85°C
Symbol
VIH
VIL
VOH
Characteristic
HIGH Level Input Voltage (Note 2.)
LOW Level Input Voltage (Note 2.)
HIGH Level Output Voltage
Condition
2.7 V
≤
VCC
≤
3.6 V
2.7 V
≤
VCC
≤
3.6 V
2.7 V
≤
VCC
≤
3.6 V; IOH = –100
µA
VCC = 2.7 V; IOH = –12 mA
VCC = 3.0 V; IOH = –18 mA
VCC = 3.0 V; IOH = –24 mA
VOL
LOW Level Output Voltage
2.7 V
≤
VCC
≤
3.6 V; IOL = 100
µA
VCC = 2.7 V; IOL= 12 mA
VCC = 3.0 V; IOL = 16 mA
VCC = 3.0 V; IOL = 24 mA
2. These values of VI are used to test DC electrical characteristics only.
VCC – 0.2
2.2
2.4
2.2
0.2
0.4
0.4
0.55
V
Min
2.0
0.8
Max
Unit
V
V
V
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691
MC74LCX374
DC ELECTRICAL CHARACTERISTICS
(Continued)
TA = –40°C to +85°C
Symbol
II
IOZ
IOFF
ICC
∆I
CC
Characteristic
Input Leakage Current
3–State Output Current
Power–Off Leakage Current
Quiescent Supply Current
y
Condition
2.7 V
≤
VCC
≤
3.6 V; 0 V
≤
VI
≤
5.5 V
2.7
≤
VCC
≤
3.6 V; 0 V
≤
VO
≤
5.5 V;
VI = VIH or V IL
VCC = 0 V; VI or VO = 5.5 V
2.7
≤
VCC
≤
3.6 V; VI = GND or VCC
2.7
≤
VCC
≤
3.6 V; 3.6
≤
VI or VO
≤
5.5 V
Increase in ICC per Input
2.7
≤
VCC
≤
3.6 V; VIH = VCC – 0.6 V
Min
Max
±5.0
±5.0
10
10
±10
500
Unit
µA
µA
µA
µA
µA
µA
AC CHARACTERISTICS
(tR = tF = 2.5 ns; CL = 50 pF; RL = 500
Ω)
Limits
TA = –40°C to +85°C
VCC = 3.0 V to 3.6 V
Symbol
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
ts
th
tw
tOSHL
tOSLH
Parameter
Clock Pulse Frequency
Propagation Delay
CP to On
Output Enable Time to HIGH and
LOW Levels
Output Disable Time from HIGH and
LOW Levels
Setup TIme, HIGH or LOW Dn to CP
Hold TIme, HIGH or LOW Dn to CP
CP Pulse Width, HIGH or LOW
Output–to–Output Skew
(Note 3.)
Waveform
1
1
2
2
1
1
3
Min
150
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
1.0
1.0
8.5
8.5
8.5
8.5
7.5
7.5
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
9.5
9.5
9.5
9.5
8.5
8.5
Max
VCC = 2.7 V
Min
Max
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
VOLP
Characteristic
Dynamic LOW Peak Voltage (Note 4.)
Condition
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
Min
Typ
0.8
Max
Unit
V
VOLV
Dynamic LOW Valley Voltage (Note 4.) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
CIN
COUT
CPD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Condition
VCC = 3.3 V, VI = 0 V or VCC
VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
Typical
7
8
25
Unit
pF
pF
pF
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