Not recommended for new design, use VS-GA250SA60S
VS-GA200SA60SP
www.vishay.com
Vishay Semiconductors
Insulated Gate Bipolar Transistor Ultralow V
CE(on)
, 342 A
FEATURES
• Standard: Optimized for minimum saturation
voltage and low speed up to 5 kHz
• Lowest conduction losses available
• Fully isolated package (2500 V
AC
)
• Very low internal inductance (5 nH typical)
• Industry standard outline
SOT-227
• UL approved file E78996
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
600 V
1.33 V
200 A
SOT-227
PRODUCT SUMMARY
V
CES
V
CE(on)
(typical) at 200 A, 25 °C
I
C
at T
C
= 97 °C
(1)
Package
BENEFITS
• Designed for increased operating efficiency in power
conversion: UPS, SMPS, TIG welding, induction heating
• Easy to assemble and parallel
• Direct mounting to heatsink
• Plug-in compatible with other SOT-227 packages
Note
(1)
Maximum I
RMS
current admitted 100 A to do not exceed the
maximum temperature of terminals
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Collector to emitter breakdown voltage
Continuous collector current
SYMBOL
V
CES
I
C (1)
T
C
= 25 °C
T
C
= 97 °C
Repetitive rating; V
GE
= 20 V, pulse width limited
by maximum junction temperature
See fig. 15
V
CC
= 80 % (V
CES
), V
GE
= 20 V,
L = 10 μH, R
g
= 2.0
,
See fig. 14
Repetitive rating; pulse width limited by
maximum junction temperature
Any terminal to case, t = 1 minute
T
C
= 25 °C
T
C
= 100 °C
TEST CONDITIONS
MAX.
600
342
200
400
UNITS
V
Pulsed collector current
I
CM
A
Clamped Inductive load current
Gate to emitter voltage
Reverse voltage avalanche energy
RMS isolation voltage
Maximum power dissipation
Operating junction and storage
temperature range
Mounting torque
I
LM
V
GE
E
ARV
V
ISOL
P
D
T
J
, T
Stg
400
± 20
155
2500
781
312
- 55 to + 150
V
mJ
V
W
°C
lbf
in
(N
m)
6-32 or M3 screw
12 (1.3)
Note
(1)
Maximum I
RMS
current admitted 100 A to do not exceed the maximum temperature of terminals
Revision: 26-Jul-13
Document Number: 94363
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Not recommended for new design, use VS-GA250SA60S
VS-GA200SA60SP
www.vishay.com
Vishay Semiconductors
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Junction and storage temperaure range
Thermal resistance, junction to case
Thermal resistance case to heatsink
Weight
Mounting torque
Case style
SYMBOL
T
J
, T
STG
R
thJC
R
thCS
Flat, greased surface
MIN.
- 55
-
-
-
-
TYP.
-
-
0.05
30
-
MAX.
150
0.16
-
-
1.3
SOT-227
g
Nm
°C/W
UNITS
ELECTRICAL SPECIFICATIONS
(T
J
= 25 °C unless otherwise noted)
PARAMETER
Collector to emitter breakdown voltage
Emitter to collector breakdown voltage
SYMBOL
V
(BR)CES
V
(BR)ECS
(1)
TEST CONDITIONS
V
GE
= 0 V, I
C
= 250 μA
V
GE
= 0 V, I
C
= 1.0 A
V
GE
= 0 V, I
C
= 1.0 mA
I
C
= 100 A
I
C
= 200 A
I
C
= 100 A, T
J
= 150 °C
V
CE
= V
GE
, I
C
= 250 μA
V
CE
= V
GE
, I
C
= 2 mA
V
CE
= 100 V, I
C
= 100 A
V
GE
= 0 V, V
CE
= 600 V
V
GE
= 0 V, V
CE
= 10 V, T
J
= 150 °C
V
GE
= ± 20 V
V
GE
= 15 V
See fig. 2, 5
MIN.
600
18
-
-
-
-
3.0
-
90
-
-
-
TYP.
-
-
0.62
1.10
1.33
1.02
-
- 10
150
-
-
-
MAX.
-
-
-
1.3
-
-
6.0
-
-
1.0
10
± 250
UNITS
V
V/°C
Temperature coeff. of breakdown voltage
V
(BR)CES
/T
J
Collector to emitter saturation voltage
Gate threshold voltage
Temperature coeff. of threshold voltage
Forward transconductance
Zero gate voltage collector current
Gate to emitter leakage current
Notes
(1)
Pulse width
80 μs; duty factor
0.1 %
(2)
Pulse width 5.0 μs, single shot
V
CE(on)
V
GE(th)
V
GE(th)
/T
J
g
fe
(2)
V
mV/°C
S
mA
nA
I
CES
I
GES
SWITCHING CHARACTERISTICS
(T
J
= 25 °C unless otherwise specified)
PARAMETER
Total gate charge (turn-on)
Gate emitter charge (turn-on)
Gate collector charge (turn-on)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on switching loss
Turn-off switching loss
Total switching loss
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total switching loss
Internal emitter inductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Revision: 26-Jul-13
SYMBOL
Q
g
Q
ge
Q
gc
t
d(on)
t
r
t
d(off)
t
f
E
on
E
off
E
ts
t
d(on)
t
r
t
d(off)
t
f
E
ts
L
E
C
ies
C
oes
C
res
TEST CONDITIONS
I
C
= 100 A
V
CC
= 400 V
V
GE
= 15 V; See fig. 8
T
J
= 25 °C
I
C
= 100 A
V
CC
= 480 V
V
GE
= 15 V
R
g
= 2.0
Energy losses include “tail”
See fig. 9, 10, 13
T
J
= 150 °C
I
C
= 100 A, V
CC
= 480 V
V
GE
= 15 V, R
g
= 2.0
Energy losses include “tail”
See fig. 10, 11, 13
Between lead, and center of
the die contact
V
GE
= 0 V
V
CC
= 30 V
f = 1.0 MHz; See fig. 7
MIN.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP.
770
100
260
78
56
890
390
0.98
17.4
18.4
72
60
1500
660
35.7
5.0
16 250
1040
190
MAX.
1200
150
380
-
-
1300
580
-
-
25.5
-
-
-
-
-
-
-
-
-
pF
mJ
nH
ns
mJ
ns
nC
UNITS
Document Number: 94363
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Not recommended for new design, use VS-GA250SA60S
VS-GA200SA60SP
www.vishay.com
Vishay Semiconductors
For both:
Triangular wave:
Duty cycle: 50 %
I
T
J
= 125 °C
T
sink
= 90 °C
Clamp voltage:
Gate drive as specified
80 % of rated
Power dissipation = 140 W
250
200
Load Current (A)
150
Square wave:
60 % of rated
voltage
I
100
50
Ideal diodes
0
0.1
1
10
100
f - Frequency (kHz)
Fig. 1 - Typical Load Current vs. Frequency
(Load Current = I
RMS
of Fundamental)
I
C
- Collector to Emitter Current (A)
1000
160
T
J
= 150 °C
T
C
- Case Temperature (°C)
140
120
100
80
60
40
20
0
0
50
100
150
200
250
300
350
DC
100
T
J
= 25 °C
10
V
GE
= 15 V
20 µs pulse width
1
0.5
1.0
1.5
2.0
2.5
V
CE
- Collector to Emitter Voltage (V)
Fig. 2 - Typical Output Characteristics
Maximum DC Collector Current (A)
Fig. 4 - Maximum Collector Current vs. Case Temperature
I
C
- Collector to Emitter Current (A)
1000
V
CE
- Collector to Emitter Voltage (V)
3
V
GE
= 15 V
80 µs pulse width
T
J
= 150 °C
T
J
= 25 °C
100
2
I
C
= 400 A
I
C
= 200 A
I
C
= 100 A
1
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
V
CC
= 50 V
5 µs pulse width
10
5
6
7
V
GE
- Gate to Emitter Voltage (V)
Fig. 3 - Typical Transfer Characteristics
T
J
- Junction Temperature (°C)
Fig. 5 - Typical Collector to Emitter Voltage vs.
Junction Temperature
Revision: 26-Jul-13
Document Number: 94363
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Not recommended for new design, use VS-GA250SA60S
VS-GA200SA60SP
www.vishay.com
1
Vishay Semiconductors
Z
thJC -
Thermal Response
0.1
D = 0.75
D = 0.50
D = 0.25
D = 0.10
D = 0.05
D = 0.02
D = 0.01
0.01
0.1
1
10
100
0.01
Single pulse
(thermal resistance)
0.001
0.0001
0.001
t
1
- Rectangular Pulse Duration (s)
Fig. 6 - Maximum Effective Transient Thermal Impedance, Junction to Case
30 000
25
Total Switching Losses (mJ)
C - Capacitance (pF)
24 000
V
GE
= 0 V, f = 1 MHz
C
ies
= C
ge
+ C
gc
, C
ce
shorted
C
res
= C
gc
C
oes
= C
ce
+ C
gc
C
ies
24
23
22
21
20
19
18
V
CC
= 480 V
V
GE
= 15 V
T
J
= 25 °C
I
C
= 200 A
18 000
12 000
C
oes
6000
C
res
0
1
10
100
0
10
20
30
40
50
V
CE
- Collector to Emitter Voltage (V)
Fig. 7 - Typical Capacitance vs.
Collector to Emitter Voltage
20
R
g
- Gate Resistance (Ω)
Fig. 9 - Typical Switching Losses vs. Gate Resistance
1000
V
GE
- Gate to Emitter Voltage (V)
16
Total Switching Losses (mJ)
V
CC
= 400 V
I
C
= 100 A
R
G
= 2.0
Ω
V
GE
= 15 V
V
CC
= 480 V
I
C
= 350 A
100
I
C
= 200 A
I
C
= 100 A
12
8
4
0
0
200
400
600
800
10
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
Q
G
- Total Gate Charge (nC)
Fig. 8 - Typical Gate Charge vs. Gate to Emitter Voltage
T
J
- Junction Temperature (°C)
Fig. 10 - Typical Switching Losses vs.
Junction Temperature
Revision: 26-Jul-13
Document Number: 94363
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Not recommended for new design, use VS-GA250SA60S
VS-GA200SA60SP
www.vishay.com
160
Vishay Semiconductors
Total Switching Losses (mJ)
120
R
G
= 2.0
Ω
T
J
= 150 °C
V
CC
= 480 V
V
GE
= 15 V
50 V
L
V
C
*
D.U.T.
80
1
40
1000 V
2
* Driver same type as D.U.T.; V
C
= 80 % of V
CE
(max)
0
100
150
200
250
300
350
Note:
Due to the 50 V power supply, pulse width and inductor
will increase to obtain rated I
d
I
C
- Collector Current (A)
Fig. 11 - Typical Switching Losses vs. Collector Current
Fig. 13a - Clamped Inductive Load Test Circuit
1000
I
C
- Collector Current (A)
100
V
GE
= 20 V
T
J
= 125 °C
R
L
=
0 V to 480 V
480 µF
960 V
480 V
4 x I
C
at 25 °C
10
Safe operating area
1
1
10
100
1000
V
CE
- Collector to Emitter Voltage (V)
Fig. 12 - Turn-Off SOA
Fig. 13b - Pulsed Collector Current Test Circuit
I
C
L
Driver*
50 V
1000 V
1
2
3
D.U.T.
V
C
* Driver same type as D.U.T., V
C
= 480 V
Fig. 14a - Switching Lost Test Circuit
Revision: 26-Jul-13
Document Number: 94363
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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