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Datasheet
AS1710/AS1712
H i g h - O u t p u t - D r i v e , 1 0 M H z , 1 0 V /µ s , R a i l - t o - R a i l I / O O p A m p s
with Shutdown
1 General Description
The AS1710/AS1712 are low-offset, high-output CMOS op-amps
that deliver 200mA of peak output current from a single supply (2.7V
to 5.5V).
These devices were specifically designed to drive typical headset
levels (32), as well as bias RF power amplifiers for wireless
handset applications.
The devices are available as the standard products shown in
Table 1.
See also
Ordering Information on page 18.
Table 1. Standard Products
Model
AS1710A
AS1710B
AS1712A
Description
Single Op Amp with Shutdown
Single Op Amp
Quad Op Amp with Shutdown
2 Key Features
Constant Output Drive Capability: 50mA
Supply Current: 1.6mA
Single-Supply Operation: 2.7V to 5.5V
Gain-Bandwidth Product: 10MHz
High Slew Rate: 10V/µs
These rail-to-rail I/O, wide-bandwidth amplifiers exhibit a high slew
rate of 10V/µs and a gain-bandwidth product of 10MHz.
The integrated shutdown feature (not included in B versions) drives
the output low.
These devices operate over the entire industrial temperature range
(-40ºC to +85ºC).
Figure 1. AS1710 - Typical Application
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Voltage Gain: 100dB (R
LOAD
= 100k)
Power-Supply Rejection Ratio: -85dB
Package
SC70-6
SC70-5
No Phase Reversal for Overdriven Inputs
Unity-Gain Stable for Capacitive Loads: Up to 100pF
Shutdown Mode (AS1710A) Current: 1nA typ
Package Types:
TQFN-16
(3x3mm)
- SC70-6
- SC70-5
- TQFN-16 (3x3mm)
3 Applications
The devices are ideal for portable/battery-powered audio
applications, portable headphone speaker drivers (32), hands-free
mobile phone kits, TFT panels, sound ports/cards, set-top boxes,
biasing controls, DAC converter buffers, transformer/line drivers,
motor drivers, and any other battery-operated audio device.
R
F
Audio In
Left
C
IN
R
IN
–
AS1710
C
OUT
+
Headphone Jack
to 32 Stereo
Headset
+
V
BIAS
+
AS1710
R
IN
C
OUT
+
Audio In
Right
C
IN
–
R
F
Revision 1.9
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Rail-to-Rail Input and Output
AS1710/AS1712
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
IN+ 1
6 VDD
IN+ 1
5 VDD
VSS 2
AS1710-A
SC70-6
5 SHDNN
VSS 2
AS1710-B
SC70-5
4 OUT
IN- 3
4 OUT
IN- 3
4.1 Pin Descriptions
Table 2. Pin Descriptions
Pin Number
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Pin Name
IN+
IN-
VDD
VSS
See
Figure 2
Te
SHDNN
OUT
Exposed Pad
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15 OUT1
14 OUT4
16 IN1-
IN1+ 1
VDD 2
13 IN4-
12 IN4+
IN2+ 3
IN2- 4
AS1712-A
TQFN-16 (3x3mm)
Exposed Pad
SHDNN3/4 7
11 VSS
10 IN3+
9 IN3-
OUT2 5
SHDNN1/2 6
OUT3 8
Description
Non-inverting Input
Inverting Input
Positive Supply Input
Negative Supply Input.
This pin must be connected to ground in single-supply applications.
Active Low Shutdown Control
Amplifier Output
Exposed Pad.
This pin also functions as a heat sink. Solder it to a large pad or to the circuit-board
ground plane to maximize power dissipation.
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AS1710/AS1712
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 3
may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in
Electrical Characteristics on page 4
is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 3. Absolute Maximum Ratings
Parameter
Electrical Parameters
Supply Voltage (V
DD
to V
SS
)
Supply Voltage (All Other Pins)
Output Short-Circuit Duration to
V
DD
or V
SS
Thermal Information
V
SS
- 0.3
+7
V
DD
+ 0.3
1
V
V
s
Min
Max
Units
Comments
Continuous Power Dissipation
Thermal Resistance
JA
Temperature Ranges and Storage Conditions
Storage Temperature Range
Junction Temperature
Package Body Temperature
Humidity non-condensing
Moisture Sensitive Level
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SC70-5
SC70-6
247
245
33
mW
Derate at 31mW/ºC above 70ºC
on PCB
TQFN-16
(3x3mm)
ºC/W
-65
+150
ºC
+150
ºC
+260
ºC
5
85
%
1
Represents a maximum floor life time of unlimited
Revision 1.9
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
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AS1710/AS1712
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
All limits are guaranteed. The parameters with Min and Max values are guaranteed by production tests or SQC (Statistical Quality Control)
methods.
6.1 DC Electrical Characteristics
V
DD
= 2.7V, V
SS
= 0V, V
CM
= V
DD
/2, V
OUT
= V
DD
/2, R
LOAD
= Infinite, V
SHDNN
= V
DD
, Typical values at T
AMB
= 25ºC.
Table 4. DC Electrical Characteristics
Symbol
T
AMB
V
DD
V
OFFSET
I
BIAS
I
OFFSET
R
IN
V
CM
CMRR
PSRR
R
OUT
V
OUT-SHDNN
A
VOL
Parameter
Operating Temperature Range
Supply Voltage Range
Input Offset Voltage
Input Bias Current
V
CM
= V
SS
to V
DD
V
CM
= V
SS
to V
DD
Inferred from Power Supply
Rejection Ratio Test
Condition
Min
-40
2.7
-3
0.6
50
1
Typ
Input Offset Current
Input Resistance
Common Mode Input
Voltage Range
Common Mode
Rejection Ratio
Power Supply Rejection Ratio
Shutdown Output Impedance
Shutdown Output Voltage
Large Signal Voltage Gain
V
OUT
Output Voltage Swing
Output Voltage
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I
OUT
Output Source/Sink Current
I
DD
Quiescent Supply Current per
Op Amp Output
Shutdown Supply Current per
Op Amp (A-Versions)
SHDNN Logic Threshold
(A-Versions)
SHDNN Input Bias Current
I
DD-SHDNN
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1. Guaranteed by design.
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50
1
1000
1
Inferred from Common Mode
1
Rejection Ratio
V
SS
< V
CM
< V
DD
V
DD
= 2.7 to 5.5V
V
SS
-45
-70
-70
-85
V
SHDNN
= 0V (A-Versions)
130
1
V
SHDNN
= 0V, R
LOAD
= 2k to V
DD
(A-Versions)
170
92
V
SS
+ 0.20V < V
OUT
<
V
DD
- 0.20V
R
LOAD
= 100k
R
LOAD
= 2k
R
LOAD
= 200
R
LOAD
= 32
R
LOAD
= 2k
R
LOAD
= 200
I
LOAD
= 10mA,
V
DD
= 2.7V
85
100
80
79
69
V
DD
- V
OH
or
V
OL
- V
SS
350
70
9
V
DD
- V
OH
or
V
OL
- V
SS
55
I
LOAD
= 30mA,
V
DD
= 5V
100
V
DD
= 2.7V,
V- = V
CM
, V+ = V
CM
±100mV
V
DD
= 5.0V,
V- = V
CM
, V+ = V
CM
±100mV
V
DD
= 2.7V, V
CM
= V
DD
/2
V
DD
= 5.0V, V
CM
= V
DD
/2
100
200
1.6
2.3
1
V
SHDNN
= 0V
Shutdown Mode
V
DD
= 2.7V
V
SS
+
0.3
V
DD
-
0.3
50
1
Normal Operation
V
SS
< V
SHDNN
< V
DD
(A-Versions)
Revision 1.9
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+85
5.5
+3
Unit
ºC
V
mV
pA
pA
M
V
V
DD
dB
dB
300
mV
dB
650
20
120
mV
100
mV
180
mA
3.2
4.6
2000
1
mA
nA
V
pA
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