Preliminary Datasheet
AS1355
3 0 0 m A , Tr i p l e L D O
1 General Description
The AS1355 is a high-performance triple CMOS low-
dropout voltage regulator in a single QFN package. The
efficient set of programmable power supplies is opti-
mized to deliver the best compromise between quies-
cent current and regulator performance for mobile
phones, PDAs, MP3 players, and other battery powered
devices.
Stability is guaranteed with ceramic output capacitors of
only 1µF (±20% – X5R) up to 4.7µF (±20% – X5R). The
low equivalent series resistance (ESR) of these capaci-
tors ensures low output impedance at high frequencies.
Regulation performance is excellent even under low
dropout conditions, when the power transistor has to
operate in linear mode.
The low-noise performance allows direct connection of
noise sensitive circuits without additional filtering net-
works.
The AS1355 is available in a 16-pin QFN 3x3 package.
2 Key Features
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
3 Independent Voltage Regulators with Shutdown
Output Current: 300mA each LDO
Programmable Output Voltage Range: 1.25V to
3.6V in 50mV Steps
Accuracy: ±1.0%
PSRR: 70dB at 1kHz, 60dB at 100kHz
Line Regulation: ±2mV
Load Regulation: ±0.6mV
Supply Range: 2.3V to 5.5V
0.1V Dropout Voltage @ Iload = 200mA
Shutdown Current:
≤1µA
Supply Current Without Load: 160µA (typ)
Softstart for Low Inrush Current
Stable with low ESR Ceramic Capacitors from 1µF
to 4.7µF
Low Noise: 40µV rms @10Hz to 100kHz Bandwidth
Thermal Protection
Over-Current Protection
Temperature Range: -40°C to +85°C
16-pin QFN 3x3 Package
3 Applications
The AS1355 is ideal for cordless and mobile phones,
MP3 players, CD and DVD players, PDAs, hand-held
computers, digital cameras, and any other hand-held
battery-powered device.
Figure 1. AS1355 - Typical Application Diagram
+5V
VDD1
VOUT1
1µF
VDD2
1µF
VDD3
VOUT3
VOUT2
1µF
1.5V
1µF
REF
C
REF
= 100nF
(Improved Noise Performance)
GND
1.8V
3.3V
AS1355
VDDA
EN1
µP
EN2
EN3
www.austriamicrosystems.com
Revision 0.08
1 - 11
AS1355
Preliminary Datasheet - P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
EN2
16
EN1
1
EN3
15
NC
14
REF
13
12 GND
VDDA
2
AS1355
11 GND
VDD1
3
17
4
5
6
7
8
NC
10 NC
VDD2
9
VDD3
VOUT1 VOUT2 VOUT3
Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
2
3
4
5
6
7
8
9
10
11, 12
13
14
15
16
17
Pin Name
EN1
VDDA
VDD1
VDD2
VOUT1
VOUT2
VOUT3
NC
VDD3
NC
GND
REF
NC
EN3
EN2
NC
Description
Active-High Enabel Input 1.
Pull this pin to low to disable the regulated output
voltage
V
OUT1
.
Analog Power Supply Voltage
Unregulated Input Voltage 1
Unregulated Input Voltage 2
Regulated Output Voltage 1
Regulated Output Voltage 2
Regulated Output Voltage 3
Not Connected
Unregulated Input Voltage 3
Not Connected
Ground.
Note:
All GND pins must be connected together externally.
Reference Voltage.
Note:
Connect to a 100nF capacitor during normal operation.
Not Connected
Active-High Enabel Input 3.
Pull this pin to low to disable the regulated output
voltage
V
OUT3
.
Active-High Enabel Input 2.
Pull this pin to low to disable the regulated output
voltage
V
OUT2
.
Exposed Pad.
This pad is not connected internally, it can be connected to GND.
www.austriamicrosystems.com
Revision 0.08
2 - 11
AS1355
Preliminary Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sec-
tions of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
ENx, VDDx to GND
VOUTx to GND
Any other pin to GND
Thermal Resistance
Θ
JA
Package-Body Peak
Temperature
Operating Temperature
Storage Temperature
Electrostatic Discharge
Protection (ESD) Level
-40
-65
2
Min
-0.3
-0.3
-0.3
Max
7
5
V
DD
+ 0.3
33
Units
V
V
V
ºC/W
on PCB
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/JEDEC J-STD-020D “Moisture/Reflow
Sensitivity Classification for non-hermetic
Solid State Surface Mount Devices”.
Comments
260
°C
85
150
°C
°C
kV
HBM – Norm:
MIL 883 E method 3015.
www.austriamicrosystems.com
Revision 0.08
3 - 11
AS1355
Preliminary Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
V
DD
= 4V,
C
OUT
= 1µF,
T
AMB
= -40°C to +85°C (Typ values are for
T
AMB
= 25°C), unless otherwise specified;
Table 3. Electrical Characteristics
Symbol
V
DD
V
OUT
R
ON
PSRR
1
I
OFF
I
VDD
t
set
1
Parameter
Supply Voltage Range
Output Voltage Range
On Resistance
Power Supply
Rejection Ratio
Shut Down Current
Supply Current
Output Voltage
Settling Time
f = 1kHz, C
REF
= 100nF
f = 100kHz, C
REF
= 100nF
ENx = Low, T
AMB
= +25°C
Without Load
I
LOAD
Switched from 0 to 100mA
C
REF
= 100nF Pre-charged
t
start
1
Start-up Time
2
C
REF
= 0nF Uncharged
C
REF
= 100nF Uncharged
V
OUT
V
LINEREG
V
LOADREG
V
IH
V
IL
I
LOAD
I
LIMIT
V
Noise
Output Voltage Tolerance
Line Regulation, Static
Load Regulation, Static
Enable Input Voltage High
Enable Input Voltage Low
Output Current
Output Current Limitation
Output Noise Voltage
Thermal Protection
1. Guaranteed by design and verified by lab evaluation.
2. Startup is performed if any EN pin goes high.
10Hz to 100kHz, C
REF
= 100nF
0
450
40
150
I
LOAD
= 0mA, T
AMB
= 25°C
I
LOAD
= 0 to 300mA
V
OUT(NOM)
+0.3V to 5.5V
I
LOAD
= 0 to 50 mA
I
LOAD
= 0 to 300 mA
1.5
0.4
300
-1
-2
-1
0.5
3
200
15
1
2
1
2.5
10
160
Conditions
Min
2.3
1.25
0.5
70
60
1
240
50
300
Typ
Max
5.5
3.6
1
Unit
V
V
Ω
dB
µA
µA
µs
µs
µs
ms
%
%
%
mV
1
mV
1
V
V
mA
mA
µV
RMS
°C
Note:
All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or
SQC (Statistical Quality Control) methods.
www.austriamicrosystems.com
Revision 0.08
4 - 11
AS1355
Preliminary Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
V
DD
= 4V,
V
OUT
= 3.3V, C
OUT
= 1µF,
T
AMB
= +25°C (unless otherwise specified);
Figure 3. Load Regulation; V
OUT
vs. I
OUT
3.36
3.34
Figure 4. Line Regulation; V
OUT
vs. V
IN
1.84
1.83
Output Voltage (V)
3.32
3.3
3.28
3.26
3.24
0
50
100
150
200
250
300
Output Voltage (V)
1.82
1.81
1.8
1.79
1.78
1.77
1.76
2
2.5
3
3.5
4
4.5
5
5.5
Output Current (mA)
Figure 5. Output Voltage vs. Temp.; I
OUT
= 1mA
3.36
3.34
Input Voltage (V)
Figure 6. Quiescent Current vs. Temperature
240
220
Quiescent Current (µA)
Output Voltage (V)
200
180
160
140
120
100
80
-45 -30 -15
3.32
3.3
3.28
3.26
3.24
-45 -30 -15
0
15
30
45
60
75
90
0
15
30
45
60
75
90
Temperature (°C)
Figure 7. Startup; no Load, no C
REF
Temperature (°C)
Figure 8. Startup; R
LOAD
= 11Ω, no C
REF
2V/Div
V
DD
V
DD
V
OUT
1V/Div
50µs/Div
V
OUT
50µs/Div
www.austriamicrosystems.com
Revision 0.08
1V/Div
2V/Div
5 - 11