Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
FEATURES
•
12-bit resolution
•
Sampling rate up to 55 MHz
• −3
dB bandwidth of 190 MHz
•
5 V power supplies
•
Binary or twos-complement CMOS outputs
•
In-range CMOS-compatible output
•
TLL-CMOS compatible static digital inputs
•
3 to 5 V CMOS-compatible digital outputs
•
Differential clock input; Positive Emitter Coupled Logic
(PECL)-compatible
•
Power dissipation 325 mW (typical)
•
Low analog input capacitance (typical 2 pF), no buffer
amplifier required
•
Integrated sample-and-hold amplifier
•
Differential analog input
•
External amplitude range control
•
Voltage controlled regulator included.
QUICK REFERENCE DATA
SYMBOL
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
INL
DNL
f
CLK(max)
PARAMETER
analog supply voltage
digital supply voltage
output supply voltage
analog supply current
digital supply current
output supply current
integral non-linearity
differential non-linearity
maximum clock frequency
TDA8768H/4
TDA8768H/5
P
tot
total power dissipation
40
55
−
−
−
325
f
CLK
= 4 MHz; f
i
= 400 kHz
f
CLK
= 4 MHz; f
i
= 400 kHz
f
CLK
= 4 MHz; f
i
= 400 kHz
CONDITIONS
MIN.
4.75
4.75
3.0
−
−
−
−
−
TYP.
5.0
5.0
3.3
33
30
3.2
±2.0
±0.6
GENERAL DESCRIPTION
APPLICATIONS
TDA8768
•
High-speed analog-to-digital conversion for
– Video signal digitizing
– High Definition TV (HDTV)
– Imaging (camera scanner)
– Medical imaging
– Telecommunication
– Base-station receiver.
The TDA8768 is a bipolar 12-bit Analog-to-Digital
Converter (ADC) optimized for telecommunications and
professional imaging. It converts the analog input signal
into 12-bit binary coded digital words at a maximum
sampling rate of 55 MHz. All static digital inputs (SH, CE
and OTC) are TTL and CMOS compatible and all outputs
are CMOS compatible. A sine wave clock input signal can
also be used.
MAX.
5.25
5.25
5.25
tbf
tbf
tbf
±4.5
±1.0
−
−
tbf
UNIT
V
V
V
mA
mA
mA
LSB
LSB
MHz
MHz
mW
ORDERING INFORMATION
TYPE
NUMBER
TDA8768H/4
TDA8768H/5
PACKAGE
NAME
QFP44
DESCRIPTION
plastic quad flat package; 44 leads
(lead length 1.3 mm); body 10
×
10
×
1.75 mm
VERSION
SOT307-2
SAMPLING
FREQUENCY (MHz)
40
55
1998 Aug 26
2
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
PINNING
SYMBOL
n.c.
V
CCA1
V
CCA3
AGND3
n.c.
n.c.
n.c.
n.c.
V
CCA2
AGND2
V
ref
n.c.
n.c.
n.c.
V
CCD2
n.c.
DGND2
OTC
CE
IR
D11
D10
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
DESCRIPTION
not connected
analog supply voltage 1 (+5 V)
analog supply voltage 3 (+5 V)
analog ground 3
not connected
not connected
not connected
not connected
analog supply voltage 2 (+5 V)
analog ground 2
reference voltage input
not connected
not connected
not connected
digital supply voltage 2 (+5 V)
not connected
digital ground 2
control input twos complement
output; active HIGH
chip enable input
(CMOS level; active LOW)
in-range output
data output; bit 11 (MSB)
data output; bit 10
CLK
V
CCD1
DGND1
SH
AGND4
V
CCA4
V
I
V
I
AGND1
36
37
38
39
40
41
42
43
44
SYMBOL
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
V
CCO
OGND
CLK
PIN
23
24
25
26
27
28
29
30
31
32
33
34
35
TDA8768
DESCRIPTION
data output; bit 9
data output; bit 8
data output; bit 7
data output; bit 6
data output; bit 5
data output; bit 4
data output; bit 3
data output; bit 2
data output; bit 1
data output; bit 0 (LSB)
output supply voltage (3 to 5.25 V)
output ground
complementary clock input; active
LOW
clock input
digital supply voltage 1 (+5 V)
digital ground 1
sample-and-hold enable input
(CMOS level; active HIGH)
analog ground 4
analog supply voltage 4 (+5 V)
positive analog input voltage
negative analog input voltage
analog ground 1
1998 Aug 26
4
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