FUJITSU MICROELECTRONICS
DATA SHEET
DS07-13752-2E
16-bit Microcontroller
CMOS
F
2
MC-16LX MB90950 Series
MB90F952JD(S)/F952MD(S)/
MB90V950JA(S)/V950MA(S)
■
DESCRIPTION
The MB90950-series with up to 2 FULL-CAN* interfaces and Flash ROM is especially designed for automotive
and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part
A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a
normal FULL-CAN approach. With the new 0.18
µm
CMOS technology, Fujitsu now offers on-chip Flash ROM
program memory up to 512 Kbytes.
The power to the MCU core (1.8 V) is supplied by a built-in regulator circuit, giving these microcontrollers superior
performance in terms of power consumption and tolerance to EMI.
* : Controller Area Network (CAN) - License of Robert Bosch GmbH
Note : F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.11
MB90950 Series
■
FEATURES
•
CPU
• Instruction system best suited to controller
- Wide choice of data types (bit, byte, word, and long word)
- Wide choice of addressing modes (23 types)
- Enhanced functionality with signed multiply and divide instructions and the RETI instruction
- Enhanced high-precision computing with 32-bit accumulator
• Instruction system compatible with high-level language (C language) and multitask
- Employing system stack pointer
- Various enhanced pointer indirect instructions
- Barrel shift instructions
• Increased processing speed
4-byte instruction queue
•
Serial interface
• UART (LIN/SCI) : up to 7 channels
- Equipped with full-duplex double buffer
- Clock-asynchronous or clock-synchronous serial transmission is available
• I
2
C interface : up to 2 channels
Up to 400 kbps transfer rate
•
Interrupt controller
• Powerful 8-level, 34-condition interrupt feature
• Up to 16 external interrupts are supported
• Automatic data transfer function independent of CPU
Expanded intelligent I/O service function (EI
2
OS) : up to 16 channels
•
I/O ports
• General-purpose input/output port (CMOS output)
- 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock)
- 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock)
•
8/10-bit A/D converter : 24 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3
µs
(at 32-MHz machine clock, including sampling time)
•
8-bit D/A converter : 2 channels
•
Program patch function
Detects address matches against 6 address pointers
•
Timer
• Time-base timer, watch timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit
×
16 channels, or 16-bit
×
8 channels
• 16-bit reload timer : 4 channels
• 16-bit input/output timer
- 16-bit free-run timer : 2 channels
(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
- 16-bit input capture: (ICU): 8 channels
- 16-bit output compare: (OCU): 8 channels
2
DS07-13752-2E
MB90950 Series
•
FULL-CAN controller*
• Up to 2 channels
• Compliant with Ver2.0A and Ver2.0B CAN specifications
• 16 built-in message buffers
• CAN wake-up function
•
Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Timebase timer mode (a mode where only the oscillation clock, sub clock, timebase timer and watch timer
operate)
• Watch mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU intermittent operation mode
•
Technology
0.18
µm
CMOS technology
* : Controller Area Network (CAN) - License of Robert Bosch GmbH.
DS07-13752-2E
3
MB90950 Series
■
PRODUCT LINEUP
Part Number
Parameter
Type
CPU
System clock
ROM
RAM
Emulator-specific
power supply*
1
FPGA data*
2
Adaptor board*
2
Clock supervisor
Clock calibration
unit
MB90V950JA(S),
MB90V950MA(S)
Evaluation products
MB90F952JD(S)
MB90F952MD(S)
Flash memory products
F
2
MC-16LX CPU
On-chip PLL clock multiplier (×1,
×2, ×3, ×4, ×6, ×8,
1/2 when PLL stops)
Minimum instruction execution time : 31.25 ns (4 MHz osc. PLL
×
8)
External
30 Kbytes
Yes
Rev 050617
MB2147-20 Rev.04C or later
MB90V950JA(S) only
MB90V950JA(S) only
Yes
Yes
256 Kbytes
16 Kbytes
⎯
⎯
⎯
No
No
No
Low-voltage/CPU
(MB90V590JA(S):
operation detection
CPU operation detection
reset
reset only)
Technology
Operating
voltage range
Operating ambient
temperature
Package
0.35
µm
CMOS with built-in
power supply regulator
5 V
±
10%
⎯
PGA-299
Yes
No
0.18
µm
CMOS with built-in power supply regulator
+
Flash memory with Charge pump for
programming voltage
3.0 V to 5.5 V : When normal operating
4.0 V to 5.5 V : When Flash programming
4.5 V to 5.5 V : When using the external bus
−40 °C
to
+105 °C
QFP-100, LQFP-100
7 channels
UART
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
2 channels
24 input channels
10-bit or 8-bit resolution
Conversion time : Min 3
µs
include sample time (per one channel)
I
2
C (400 kbps)
A/D Converter
16-bit Reload Timer Operation clock frequency : fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys
=
Machine clock frequency)
Supports External Event Count function
(4 channels)
(Continued)
4
DS07-13752-2E
MB90950 Series
Part Number
Parameter
MB90V950JA(S),
MB90V950MA(S)
MB90F952JD(S)
MB90F952MD(S)
16-bit I/O Timer
(2 channels)
Generates an interrupt signal on overflow
Supports Timer Clear when the output compare finds a match
Operation clock freq. : fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
, fsys/2
5
, fsys/2
6
, fsys/2
7
(fsys
=
Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU4/5/6/7, OCU 4/5/6/7
Generates an interrupt signal when one of the 16-bit I/O timer matches the output compare
register
A pair of compare registers can be used to generate an output signal.
16-bit Output
Compare
(8 channels)
16-bit Input Capture Holds free-run timer on rising edge, falling edge or rising & falling edge
(8 channels)
Signals an interrupt upon external event
8 channels (16-bit) /16 channels (8-bit)
Sixteen 8-bit reload counters
Sixteen 8-bit reload registers for L pulse width
Sixteen 8-bit reload registers for H pulse width
Supports 8-bit and 16-bit operation modes
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
8-bit prescaler plus 8-bit reload counter
Operating clock freq. : fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
or 128
µs@fosc =
4 MHz
(fsys
=
Machine clock frequency, fosc
=
Oscillation clock frequency)
3 channels
2 channels
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission in response to Remote Frames
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering :
Full bit compare/Full bit mask/Two partial bit masks
Supports up to 1 Mbps
Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,
expanded intelligent I/O services (EI
2
OS) and DMA
2 channels
Devices with sub clock : devices without an S suffix in the
part number
Devices without sub clock : devices with an S suffix in the
part number
8/16-bit
Programmable
Pulse Generator
CAN Interface
External Interrupt
(16 channels)
D/A converter
Sub clock
Only for MB90V950JA,
(maximum 100 kHz) MB90V950MA
I/O Ports
Virtually all external pins can be used as general purpose I/O port
All ports are push-pull outputs
Bit-wise settable as input/output or peripheral signal
Can be configured 8 as CMOS schmitt trigger/ automotive inputs (in blocks of 8 pins)
TTL input level settable for external bus (32-pin only for external bus)
(Continued)
DS07-13752-2E
5
微控制器 MCU
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