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PTN3342PW

产品描述IC QUAD LINE RECEIVER, PDSO16, PLASTIC, TSSOP-16, Line Driver or Receiver
产品类别模拟混合信号IC    驱动程序和接口   
文件大小299KB,共18页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
下载文档 详细参数 全文预览

PTN3342PW概述

IC QUAD LINE RECEIVER, PDSO16, PLASTIC, TSSOP-16, Line Driver or Receiver

PTN3342PW规格参数

参数名称属性值
厂商名称NXP(恩智浦)
零件包装代码TSSOP
包装说明TSSOP,
针数16
Reach Compliance Codeunknown
ECCN代码EAR99
输入特性DIFFERENTIAL
接口集成电路类型LINE RECEIVER
接口标准EIA-644; TIA-644
JESD-30 代码R-PDSO-G16
JESD-609代码e4
长度5 mm
功能数量4
端子数量16
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态Not Qualified
最大接收延迟3 ns
接收器位数4
座面最大高度1.1 mm
最大供电电压3.6 V
最小供电电压3 V
标称供电电压3.3 V
表面贴装YES
温度等级INDUSTRIAL
端子面层NICKEL PALLADIUM GOLD
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
宽度4.4 mm

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PTN3342
High speed differential line receiver
Rev. 01 — 18 June 2001
Objective data
1. Description
The PTN3342 is a differential line receiver that implements the electrical
characteristics of Low-Voltage Differential Signaling (LVDS). This device meets or
exceeds the requirements of the ANSI
TIA/EIA-644 Standard.
LVDS is used to
achieve higher data rates on commonly used media. LVDS overcomes the limitations
of achievable slew rates and EMI restrictions of previous differential signaling
techniques. The PTN3342 operates at a 3.3 volt supply level. Any of the four
differential receivers provides a valid logical output state with a
±100
mV differential
input voltage within the input common-mode voltage range. The input common-mode
voltage range allows 1 volt of ground potential difference between two LVDS nodes.
The PTN3342 is identical to the PTN3332 but with the termination resistor integrated
with the receiver.
The intended application of this device is for point-to-point baseband transmission
rates over a controlled impedance media of approximately 100
Ω.
The maximum
rates and distance of data transfer are dependent upon the attenuation
characteristics of the media selected and the noise coupling to the environment.
The PTN3342 is designed to function over the full industrial temperature range of
−40
to +85
°C.
c
c
2. Features
s
s
s
s
s
s
s
s
s
Meets or exceeds the requirements of ANSI
TIA/EIA-644 Standard
Designed for signaling rates of up to 400 Mbps
Differential input thresholds of
±100
mV
Power dissipation of 60 mW typical at 200 MHz
Typical propagation delay of 2.1 ns
Low Voltage TTL (LVTTL) logic output levels
Pin compatible with AM26LS32 and SN65LVDS32
Open-circuit fail safe
Termination resistors on chip.

 
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