Freescale Semiconductor
Advance Information
MR2A16A/D
Rev. 0.1, 7/2004
256K x 16-Bit 3.3-V Asynchronous
Magnetoresistive RAM
Introduction
The MR2A16A is a 4,194,304-bit magnetoresistive random access memory (MRAM) device organized as
262,144 words of 16 bits. The MR2A16A is equipped with chip enable (E), write enable (W), and output
enable (G) pins, allowing for significant system design flexibility without bus contention. Because the
MR2A16A has separate byte-enable controls (LB and UB), individual bytes can be written and read.
MRAM is a nonvolatile memory technology that protects data in the event of power loss and does not
require periodic refreshing. The MR2A16A is the ideal memory solution for applications that must
permanently store and retrieve critical data quickly.
The MR2A16A is available in a 400-mil, 44-lead plastic small-outline TSOP type-II package with an
industry-standard center power and ground SRAM pinout.
Features
•
•
•
•
•
•
•
•
•
Single 3.3-V power supply
Commercial temperature range (0°C to 70°C)
Symmetrical high-speed read and write with fast access time (25 ns)
Flexible data bus control — 8 bit or 16 bit access
Equal address and chip-enable access times
Automatic data protection with low-voltage inhibit circuitry to prevent writes on power loss
All inputs and outputs are transistor-transistor logic (TTL) compatible
Fully static operation
Full nonvolatile operation with 10 years minimum data retention
© Freescale Semiconductor, Inc., 2004. All rights reserved.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Device Pin Assignment
OUTPUT
ENABLE
BUFFER
G
UPPER BYTE OUTPUT ENABLE
LOWER BYTE OUTPUT ENABLE
A[17:0] ADDRESS
BUFFERS
18
8
10
ROW
DECODER
COLUMN
DECODER
SENSE
AMPS
UPPER
BYTE
OUTPUT
BUFFER
LOWER
BYTE
OUTPUT
BUFFER
8
FINAL
WRITE
DRIVERS
UPPER
BYTE
WRITE
DRIVER
LOWER
BYTE
WRITE
DRIVER
8
8
E
CHIP
ENABLE
BUFFER
256K x 16
BIT
MEMORY
ARRAY
16
8
8
W
WRITE
ENABLE
BUFFER
8
DQU[15:8]
16
8
UB
LB
BYTE
ENABLE
BUFFER LB
UB
UPPER BYTE WRITE ENABLE
LOWER BYTE WRITE ENABLE
8
DQL[7:0]
Figure 1. Block Diagram
Device Pin Assignment
A16
A17
A10
A11
A12
E
DQL0
DQL1
DQL2
DQL3
V
DD
V
SS
DQL4
DQL5
DQL6
DQL7
W
A0
A1
A2
A3
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A15
A14
A13
G
UB
LB
DQU15
DQU14
DQU13
DQU12
V
SS
V
DD
DQU11
DQU10
DQU9
DQU8
NC
A9
A8
A7
A6
A5
Table 1. Pin Functions
Signal Name
A[17:0]
E
W
G
UB
LB
DQL[7:0]
DQU[15:8]
V
DD
V
SS
NC
Function
Address input
Chip enable
Write enable
Output enable
Upper byte select
Lower byte select
Data I/O, lower byte
Data I/O, upper byte
+3.3-V power supply
Ground
Do not connect this pin
Figure 2. MR2A16A in 44-Pin TSOP Type II Package
MR2A16A/D, Rev. 0.1
2
Freescale Semiconductor
Electrical Specifications
Table 2. Operating Modes
E
H
L
L
L
L
L
L
L
L
G
X
H
X
L
L
L
X
X
X
W
X
H
X
H
H
H
L
L
L
LB
X
X
H
L
H
L
L
H
L
UB
X
X
H
H
L
L
H
L
L
Mode
Not selected
Output disabled
Output disabled
Lower byte read
Upper byte read
Word read
Lower byte write
Upper byte write
Word write
V
DD
Current
I
SB1
, I
SB2
I
DDA
I
DDA
I
DDA
I
DDA
I
DDA
I
DDA
I
DDA
I
DDA
DQL[7:0]
Hi-Z
Hi-Z
Hi-Z
D
Out
Hi-Z
D
Out
D
In
Hi-Z
D
In
DQU[15:8]
Hi-Z
Hi-Z
Hi-Z
Hi-Z
D
Out
D
Out
Hi-Z
D
In
D
In
NOTES:
1. H = high, L = low, X = don’t care
2. Hi-Z = high impedance
Electrical Specifications
Absolute Maximum Ratings
This device contains circuitry to protect the inputs against damage caused by high static voltages or
electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage
greater than maximum rated voltages to these high-impedance (Hi-Z) circuits.
The device also contains protection against external magnetic fields. Precautions should be taken to
avoid application of any magnetic field more intense than the maximum field intensity specified in the
maximum ratings.
Table 3. Absolute Maximum Ratings
Parameter
Supply voltage
Voltage on any pin
Output current per pin
Package power dissipation
Temperature under bias
Storage temperature
Lead temperature during solder (3 minute max)
Maximum magnetic field at package surface
Symbol
V
DD
V
In
I
Out
P
D
T
Bias
T
stg
T
Lead
H
max
Value
–0.5 to 4.6
–0.5 to V
DD
+ 0.5
±20
TBD
–10 to 85
–55 to 150
235
20
Unit
V
V
mA
W
°C
°C
°C
oe
NOTES:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. Functional operation
should be restricted to recommended operating conditions. Exposure to excessive voltages or magnetic fields
could affect device reliability.
2. All voltages are referenced to V
SS
.
3. Power dissipation capability depends on package characteristics and use environment.
MR2A16A/D, Rev. 0.1
Freescale Semiconductor
3
Electrical Specifications
Table 4. Operating Conditions
Parameter
Power supply voltage
Write inhibit voltage
Input high voltage
Input low voltage
Operating temperature
NOTES:
Symbol
V
DD
V
WI
V
IH
V
IL
T
A
Min
3.0
(1)
2.5
2.2
–0.5
(3)
0
Typ
3.3
2.7
—
—
Max
3.6
3.0
(1)
V
DD
+ 0.3
(2)
0.8
70
Unit
V
V
V
V
°C
1. After power up or if V
DD
falls below V
WI
, a waiting period of 1
µs
must be observed.
Memory is designed to prevent writing for all input pin conditions if V
DD
falls below minimum V
WI
.
2. V
IH
(max) = V
DD
+ 0.3 Vdc; V
IH
(max) = V
DD
+ 2.0 Vac (pulse width
≤
10 ns) for I
≤
20.0 mA.
3. V
IL
(min) = –0.5 Vdc; V
IL
(min) = –2.0 Vac (pulse width
≤
10 ns) for I
≤
20.0 mA.
Direct Current (dc)
Table 5. dc Characteristics
Parameter
Input leakage current
Output leakage current
Output low voltage
(I
OL
= +4 mA)
(I
OL
= +100
µA)
Output high voltage
(I
OH
= –4 mA)
(I
OH
= –100 mA)
Symbol
I
lkg(I)
I
lkg(O)
V
OL
Min
—
—
—
Typ
—
—
—
Max
±1
±1
0.4
V
SS
+ 0.2
—
Unit
µA
µA
V
V
OH
2.4
V
DD
– 0.2
—
V
Table 6. Power Supply Characteristics
Parameter
ac active supply current — Read Modes
(I
Out
= 0 mA, V
DD
= max)
Timing Set
20
25
35
20
ac active supply current — Write Modes
(V
DD
= max)
ac standby current
(V
DD
= max, E = V
IH
)
(no other restrictions on other inputs)
CMOS standby current
(E
≥
V
DD
– 0.2 V and
V
In
≤
V
SS
+ 0.2 V or
≥
V
DD
– 0.2 V)
(V
DD
= max, f = 0 MHz)
25
35
20
25
35
Symbol
I
DDR
I
DDR
I
DDR
I
DDW
I
DDW
I
DDW
I
SB1
I
SB1
I
SB1
I
SB2
Typ
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
TBD
TBD
mA
MR2A16A/D, Rev. 0.1
4
Freescale Semiconductor
Electrical Specifications
Table 7. Capacitance
Parameter
Address input capacitance
Control input capacitance
Input/Output capacitance
Symbol
C
In
C
In
C
I/O
Typ
—
—
—
Max
6
6
8
Unit
pF
pF
pF
NOTES:
1. (f = 1.0 MHz, dV = 3.0 V, T
A
= 25°C, periodically sampled rather than 100% tested)
Table 8. ac Measurement Conditions
Parameter
Logic input timing measurement reference level
Logic output timing measurement reference level
Logic input pulse levels
Input rise/fall time
Output load for low and high impedance parameters
Output load for all other timing parameters
Value
1.5 V
1.5 V
0 or 3.0 V
2 ns
See Figure 3A
See Figure 3B
+3.3 V
Z
D
= 50
Ω
OUTPUT
R
L
= 50
Ω
V
L
= 1.5 V
OUTPUT
600
Ω
5 pF
725
Ω
A
B
Figure 3. Output Load for ac Test
MR2A16A/D, Rev. 0.1
Freescale Semiconductor
5
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