Enhanced N channel FET with no inherent diode to Vcc
5Ω bidirectional switches connect inputs to outputs
Ω
Zero propagation delay, zero added ground bounce
Ultra low power with 0.2µA typical Icc
µ
Undershoot clamp diodes on all switch and control inputs
Two enables control five bits each
Available in SOIC, QSOP, and TSSOP packages
DESCRIPTION:
The QS3L384 provides a set of ten high-speed CMOS TTL-compatible
bus switches. The low ON resistance of the QS3L384 allows inputs to be
connected to outputs without adding propagation delay and without gener-
ating additional ground bounce noise. The Bus Enable (BE) signals turn the
switches on. Two bus enable signals are provided, one for each of the upper
and lower five bits of the two 10-bit buses.
The QS3L384 is characterized for operation at -40°C to +85°C.
APPLICATIONS:
•
•
•
•
•
•
Hot-swapping, hot-docking
Voltage translation (5V to 3.3V)
Power Conservation
Capacitance reduction and isloation
Bus Isolation
Clock Gating
FUNCTIONAL BLOCK DIAGRAM
A
0
B
0
A
4
B
4
A
5
B
5
A
9
B
5
BE A
BE B
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2000 Integrated Device Technology, Inc.
FEBRUARY 2000
DSC-5772/2
IDTQS3L384
HIGH-SPEED LOW POWER 10-BIT BUS EXCHANGE SWITCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
V
TERM
(3)
V
AC
I
OUT
P
MAX
T
STG
Description
Supply Voltage to Ground
DC Switch Voltage V
S
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤20ns)
DC Output Current
Maximum Power Dissipation (T
A
= 85°C)
Storage Temperature
Max
–0.5 to +7
–0.5 to +7
–0.5 to +7
–3
120
0.5
–65 to +150
Unit
V
V
V
V
mA
W
°C
BEA
B
0
A
0
A
1
B
1
B
2
A
2
A
3
B
3
B
4
A
4
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
B
9
A
9
A
8
B
8
B
7
A
7
A
6
B
6
B
5
A
5
BEB
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
CAPACITANCE
(T
A
= +25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V)
Pins
Control Inputs
Quickswitch Channels (Switch OFF)
Typ.
3
5
Max.
(1)
5
7
Unit
pF
pF
SOIC/ QSOP/ TSSOP
TOP VIEW
NOTE:
1. This parameter is guaranteed but not production tested.
PIN DESCRIPTION
Pin Names
A
0
- A
9
B
0
- B
9
BEA, BEB
I/O
I/O
I/O
I
Bus A
Bus B
Bus Switch Enable
Description
FUNCTION TABLE
(1)
BEA
H
L
H
L
BEB
H
H
L
L
B
0
- A
4
Hi-Z
A
0
- A
4
Hi-Z
A
0
- A
4
B
5
- B
9
Hi-Z
Hi-Z
A
5
- A
9
A
5
- A
9
Function
Disconnect
Connect
Connect
Connect
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
Z = High-Impedance
2
IDTQS3L384
HIGH-SPEED LOW POWER 10-BIT BUS EXCHANGE SWITCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5V ± 5%
Symbol
V
IH
V
IL
I
IN
I
OZ
R
ON
V
P
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current (Control Inputs)
Off-State Current (Hi-Z)
Switch ON Resistance
Pass Voltage
(2)
Test Conditions
Guaranteed Logic HIGH for Control Pins
Guaranteed Logic LOW for Control Pins
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
V
CC
= Min., V
IN
= 0V, I
ON
= 30mA
V
CC
= Min., V
IN
= 2.4V, I
ON
= 15mA
V
IN
= V
CC
= 5V, I
OUT
= -5µA
Min.
2
—
—
—
—
—
3.7
Typ.
(1)
Max.
—
—
—
±0.01
5
10
4
—
0.8
±1
±1
7
15
4.2
V
Unit
V
V
µA
µA
Ω
NOTES:
1. Typical values are at V
CC
= 5V and T
A
= 25°C.
2. Pass voltage is guaranteed but not production tested.
TYPICAL ON RESISTANCE vs V
IN
AT V
CC
= 5V
16
R
ON
(ohms)
14
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
IN
(Volts)
3
IDTQS3L384
HIGH-SPEED LOW POWER 10-BIT BUS EXCHANGE SWITCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
I
CCQ
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Power Supply Current per Input HIGH
(2)
Dynamic Power Supply Current per MHz
(3)
Test Conditions
(1)
V
CC
= Max., V
IN
= GND or V
CC
, f = 0
V
CC
= Max., V
IN
= 3.4V, f = 0
V
CC
= Max., A and B Pins Open,
Control Inputs Toggling @ 50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TTL-driven input (V
IN
= 3.4V, control inputs only). A and B pins do not contribute to
∆Icc.
3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A and B inputs generate no significant
AC or DC currents as they transition. This parameter is guaranteed but not production tested.
Typ.
0.2
⎯
⎯
Max.
3
1.5
0.25
Unit
µA
mA
mA/MHz
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
T
A
= -40°C to +85°C, V
CC
= 5V ± 5%
C
LOAD
= 50pF, R
LOAD
= 500Ω unless otherwise noted.
Symbol
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
t
PHZ
Parameter
Data Propagation Delay
(2)
Ax to Bx, Bx to Ax
Switch Turn-On Delay
BEA, BEB
to Ax, Bx
Switch Turn-Off Delay
(2)
BEA, BEB
to Ax, Bx
Min
.
(1)
⎯
1.5
1.5
Typ.
⎯
⎯
⎯
Max.
0.25
(3)
6.5
5.5
Unit
ns
ns
ns
NOTES:
1. Minimums are guaranteed but not production tested.
2. This parameter is guaranteed but not production tested.
3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone
is of the order of 0.25ns at C
L
= 50pF. Since this time constant is much smaller than the rise and fall times of typical driving signals, it adds very little propagation delay to the
system. Propagation delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
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