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EM6517 4 Bit Microcontroller
Features
•
Low Power
- 9 µA active mode, ADC off
- 15 µA active mode, ADC on
- 1.3 µA standby mode
- 0.1µA sleep mode
@ 3.0V, 32kHz, 25°C
Voltage range logic incl. EEPROM 2.0 to 5.5 V
Voltage range for the ADC is 2.6 to 5.5 V
2 clocks per instruction cycle
72 basic instructions
EEPROM 3072
×
16 bit (program memory)
RAM
128
×
4 bit
EEPROM 64
×
8 bit (peripheral memory)
Voltage Level Detector, 3 levels software
selectable : 2.2, 2.5, 3.0 V
2 channel ADC, successive approximation method;
conversion time at 32 kHz : 305µs
Max. 12 inputs (3 ports); port A, port B, port C
Max. 8 outputs (2 ports); port B, port C
Serial Write Buffer, 256 bit wide , 4 bit rates
Oscillation supervisor and timer watchdog
Universal 10-bit counter, PWM, event counter
8 internal interrupt sources (2
×
timer , 2
×
prescaler, ADC, VLD, FIFO, EEPROM)
4 external interrupt sources (input port A )
Frequency output; 32kHz, 2kHz, 1kHz, PWM
Figure 1. Architecture
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•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Figure 2. Pin Configuration
Description
The EM6517-1 is an advanced single chip CMOS 4-bit
microcontroller. It contains ROM, RAM, power on
reset, watchdog timer, oscillation detection circuit,
2
combined timer, event counter, prescaler, E PROM, 2
channel ADC, serial write buffer, voltage level detector
and several clock functions. The low voltage feature
and low power consumption make it the most suitable
controller for battery, stand alone and mobile
equipment. The EM6517-1 is manufactured using EM
Marin’s advanced low power (ALP) CMOS Process.
Typical Applications
•
•
•
•
•
•
•
•
Sensor & detector interface
Heat meter interface
Security systems
Household equipment controls
Automotive controls
Measurement equipment
R/F and IR. control
Voltage control
©
EM Microelectronic-Marin SA, 09/99, Rev. A/277
1
FOR ENGINEERING ONLY
EM6517-1 at a glance
• Power Supply
- Low voltage low power architecture
including internal voltage regulator
- 2.0 ... 5.5 V battery voltage for all logic functions
- 2.6 ... 5.5 V battery voltage for the ADC (0.2LSB)
- 9 µA in active mode, ADC off
- 15 µA active mode, ADC on
- 1.3 µA in standby mode
- 0.1µA in sleep mode
- 32 KHz crystal oscillator
EM6517
• 2 Channel 8-bit ADC
- Conversion time is 305
µs
@32kHz
- 2 operating modes (continuous, single)
- Interrupt request at the end of conversion
• Prescaler
- 15 stage system clock divider down to 1 Hz
- 2 Interrupt requests; 1 Hz, 32 Hz or 8 Hz
- Prescaler reset (4 KHz to 1Hz)
• RAM
- 64 x 4 bit, direct addressable
- 64 x 4 bit, indirect addressable
• 4-Bit Bi-directional Port B
- All different functions bit-wise selectable
- Direct input read on the port terminals
- Data output latches
- CMOS or Nch. open drain outputs
- Pull-down or pull-up selectable
- Weak pull-up in Nch. open drain mode
- Selectable PWM, 1kHz, 32kHz and 2kHz output
• EEPROM (main program memory)
- 3072 x 16 bit programmable with EM Programmer
• E
2
PROM (peripheral)
- 64 x 8 bit, indirect addressable
- Interrupt request at the end of a write operation
• 4-Bit Bi-directional Port C
- Input or output mode as whole port
- Direct input read on port terminal
- Data output latches
- CMOS or Nch. open drain outputs
- Pull-down or pull-up selectable
- Weak pull-up in Nch. open drain mode
• CPU
- 4 bit RISC architecture
- 2 clock cycles per instruction
- 72 basic instructions
• Main Operating Modes and Resets
- Active Mode (CPU is running)
- Standby Mode (CPU in halt)
- Sleep Mode (No clock, reset state)
- Initial reset on power on (POR)
- Watchdog resets (logic and oscillation watchdogs)
- Reset terminal
- Reset with input combination on port A register
selectable, ¨AND¨ or ¨OR¨ type by metal mask
• Voltage Level Detector
- 3 levels software selectable (2.0, 2.5, 3.0 V)
- Busy flag during measure
- Interrupt request at end of measure
• 10-Bit Universal Counter
- 10, 8, 6 or 4bit up/down counting
- Parallel load
- 8 different input clocks
- Event counting (PA[0] or PA[3] )
- Full 10 bit or limited (8, 6, 4 bit) compare function
- 2 interrupt requests (on compare and on 0)
- Hi-frequency input on PA[3] and PA[0]
- Pulse-width modulation (PWM) output
• 4-Bit Input Port A
- Direct input read on the port terminals
- Debouncer function available on all inputs
- Interrupt request on positive or negative edge
- Pull-up or pull-down or none selectable by register
- Test variables (software) for conditional jumps
- PA[0] and PA[3] are inputs for the event counter
- Reset with input combination (register selectable)
• Interrupt Controller
- 4 external and 8 internal interrupt request sources
- Each interrupt can individually be maskable
- Each interrupt can individually be reset
- Automatic reset of each interrupt request after read
- General interrupt request to CPU can be disabled
- Automatic enabling of general interrupt request flag
when going into HALT mode
• Serial Write Buffer (output)
- Max 256 bits long bit rates of 16kHz,8kHz,2kHz,1kHz
- Automatic or interactive send mode
- Interrupt request when buffer is empty
©
EM Microelectronic-Marin SA, 09/99, Rev. A/277
2
FOR ENGINEERING ONLY
Table of Contents
F
EATURES
D
ESCRIPTION
TYPICAL
APPLICATIONS
EM6517-1
AT A GLANCE
1.
2.
3.
Pin Description for EM6517
Typical configurations
Operating Modes
3.1
Active Mode
3.2
Standby Mode
3.3
Sleep Mode
Power Supply
Reset
5.1
Oscillation Detection Circuit
5.2
Reset Terminal
5.3
Input Port A Reset Function
5.3.1
5.3.2
AND-Type Reset function
OR -Type Reset function
EM6517
29
29
31
32
33
34
34
35
36
37
38
38
39
40
40
42
42
43
46
47
48
48
48
49
50
51
51
51
51
1
1
1
2
4
5
6
6
6
6
7
8
8
9
9
9
10
9.
Serial (Output) Write Buffer - SWB
9.1
SWB Automatic send mode
9.2
SWB Interactive send mode
9.3
SWB registers
10.
2-Channel ADC (8-bit digital converter)
10.1 Continuous mode
10.2 Single mode
10.3 2-Channel ADC registers
11.
EEPROM ( 64
×
8 Bit )
11.1 EEPROM registers
12.
Supply Voltage Level Detector
12.1 SVLD Register
13.
Interrupt Controller
13.1 Interrupt control registers
14.
RAM
4.
5.
15.
Strobe Output
15.1 Strobe register
16.
17.
18.
PERIPHERAL MEMORY MAP
Option Register Memory Map
Active Supply Current Test
5.4
5.5
6.
Digital Watchdog Timer Reset
CPU State after Reset
10
11
12
12
12
13
13
14
14
15
15
15
Oscillator and Prescaler
6.1
Oscillator
6.2
Prescaler
Input and Output ports
7.1
Ports overview
7.2
Port A
7.2.1
7.2.2
7.2.3
7.2.4
IRQ on Port A
Pull-up or Pull-down
Software Test Variables
Port A for 10-Bit Counter
7.
19.
Mask Options
19.1 Input / Output Ports
19.1.1
19.1.2
19.1.3
19.1.4
19.1.5
19.1.6
19.1.7
Port A Metal Options
Port B Metal Options
Port C Metal Options
SWB high impedance state
Debouncer Frequency Option
System Frequency
Additional mask options
7.3
7.4
7.4.1
7.4.2
7.4.3
7.4.4
Port A registers
Port B
Input / Output Mode
Pull-up or Pull-down
CMOS or Nch. Output
PWM and Frequency Output
15
17
17
17
18
19
7.5
7.6
7.6.1
7.6.2
Port B registers
Port C
Pull-up or Pull-down
CMOS or Nch. Output
19
20
20
21
20.
Temp. and Voltage Behavior
20.1 I(VDD) Current
20.2 IOL, IOH
20.3 Pull-up, Pull-down
20.4 Vreg, EEPROM
20.5 ADC8
21.
Electrical Specification
21.1 Absolute Maximum Ratings
21.2 Handling Procedures
21.3 Standard Operating Conditions
21.4 DC Characteristics - Power Supply
21.5 Oscillator
21.6 DC characteristics - I/O Pins
21.7 Supply Voltage Level Detector
21.8 ADC 8 Bit
21.9 EEPROM
22.
23.
Package Dimensions
Die, Pad Location and Size
52
52
53
54
54
55
57
57
57
57
58
58
59
60
60
60
61
64
65
65
65
7.7
8.
Port C Registers
22
23
23
24
25
25
25
26
26
10-bit Counter
8.1
Full and Limited Bit Counting
8.2
Frequency Select and Up/Down Counting
8.3
Event Counting
8.4
Compare Function
8.5
Pulse Width Modulation (PWM)
8.5.1
8.5.2
How the PWM Generator works.
PWM Characteristics
8.6
8.7
Counter Setup
10-bit Counter Registers
27
27
24.
Ordering Information
24.1 Packaged devices
24.2 DIE Form
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than
circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves
the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure
that the information given has not been superseded by a more up-to-date version.
©
EM Microelectronic-Marin SA, 09/99, Rev. A/277
3
FOR ENGINEERING ONLY
1
Pin Description for EM6517
PDIP24
SO24
17
21
18
15
14
16
19
20
10
11
12
13
6
7
5
8
4
9
-
-
22
23
24
1
PDIP28
SO28
20
24
21
18
17
19
22
23
13
14
15
16
7
8
6
9
5
10
4
12
25
26
27
28
Signal Name
V
BAT=
V
DD
V
SS
Vreg
Test
Reset
Strobe
Qin
Qout
PB[0]
PB[1]
PB[2]
PB[3]
PA[0]
PA[1]
PA[2]
PA[3]
PC[0]
PC[1]
PC[2]
PC[3]
Ain
Bin
Vref
Vgnd
Function
Positive power supply
Negative power supply
Internal voltage regulator
Input test terminal,
internal pull-down 15k
Reset terminal
internal pull-down 15k
Strobe / reset status
Crystal terminal 1
Crystal terminal 2
Input or output, CMOS or Nch.
open drain; port B terminal 0
Input or output, CMOS or Nch.
open drain; port B terminal 1
Input or output, CMOS or Nch.
open drain; port B terminal 2
Input or output, CMOS or Nch.
open drain; port B terminal 3
Input port A terminal 0
Input port A terminal 1
Input port A terminal 2
Input port A terminal 3
Input or output, CMOS or Nch.
open drain; port C terminal 0
Input or output, CMOS or Nch.
open drain; port C terminal 1
Input or output, CMOS or Nch.
open drain; port C terminal 2
Input or output, CMOS or Nch.
open drain; port C terminal 3
channel A for A/D converter
channel B for A/D converter
external voltage reference input
FOR the A/D converter
Virtual analogue ground for A/D
converter
EM6517
Remarks
Main power pin
MFP programming connection
Reference terminal, substrate
MFP programming connection
connect to minimum 100nF
MFP programming connection
for EM tests only, ground 0 !
Except for MFP programming
µC reset state + port B write
32kHz crystal
MFP programming connection
32kHz crystal
MFP programming connection
Ck[12] output (2 KHz)
Ck[16] output (32 KHz)
Ck[11] output (1 KHz)
PWM output
TestVar 1,
event counter
TestVar 2
Event counter
Bonded only in 28 pin package
Bonded only in 28 pin package
Only used for external Vref
i.e. Vref not equal to V
DD
Virtual Ground, usually V
DD
/2
2
2
Data
Serial write buffer data out
3
3
Clk
Serial write buffer clock out
The EM6517-1 can be programmed using the standard EM MFP Programming Box for 4 bit uControllers. The
Interface signals are marked in the table above (Grey shaded). The circuit can be programmed on the
programming box or directly on the PCB. For more information please refer to the Programming Box Manual.
©
EM Microelectronic-Marin SA, 09/99, Rev. A/277
4
FOR ENGINEERING ONLY
2
Typical configurations
EM6517
Full range ADC :
Vref = V
DD
, Vgnd = V
DD
/2.
For power saving one might connect the Vgnd resistor divider chain onto a port B output. This output should be
driving V
DD
during the conversion and driving V
SS
or high impedance in the ADC off state.
Figure 3. Typical Application, Full Range
Main power
V
DD
Vgnd
Vss
Full
range
ADC
32 KHz
Reset
Strobe
Port A
Port B
Port C
Vgnd
R1
Vss
Bin
Vref
V
DD
V
DD
Vreg V
SS
Ain
+
-
≈
Vss
V
DD
, or port driven
R1
>1.3V
Limited range ADC :
V
DD
> Vref > Vgnd, Vgnd=V
DD
/2.
For power saving one might connect the Vgnd and the Vref resistor divider chain onto a port B output to V
SS
.
This output should be driving V
DD
during the conversion and driving Vss or high impedance in the ADC off state.
Figure 4. Typical Application, Limited Range
Main power
+| Vref - Vgnd |
Vdd
Vref
Vgnd
Vss
32 KHz
Reset
Strobe
Port A
Port B
V
DD
Vreg Vss
Ain
Bin
Vref
Vref
limited
range
ADC
+
-
≈
Vss or Vgnd
-| Vref - Vgnd |
Vdd or Port B driven
R1
>1.3V
Vgnd
Port C
R1
C1
Vss
other possibility:
VREF = VregLogic, VGND = VregLogic/2
For power saving one might connect the Vgnd resistor divider chain from VregLogic onto a port B output. This
output should be driving V
SS
during the conversion and driving ‘high impedance’ in the ADC off state.
©
EM Microelectronic-Marin SA, 09/99, Rev. A/277
5
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