IS62LV1288LL
128K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
• Access times of 45, 55, and 70 ns
•
Low active power: 60 mW (typical)
•
Low standby power: 15 µW (typical) CMOS
standby
• Low data retention voltage: 2V (min.)
• Ultra Low Power
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• TTL compatible inputs and outputs
• Single 2.5V (min.) to 3.45V (max.) power supply
• Industrial temperature available
• Available in 32-pin TSOP (Type I), 32-pin
STSOP, and 450-mil SOP
ISSI
DESCRIPTION
®
FEBUARY 2001
The
ISSI
IS62LV1288LL is a low power and low
Vcc,131,072-word by 8-bit CMOS static RAM. It is
fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields higher
performance and low power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the
device assumes a standby mode at which the power
dissipation can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip
Enable inputs,
CE1
and CE2. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62LV1288LL is available in 32-pin TSOP (Type I),
STSOP (8 x 13.4mm), and 450-mil plastic SOP (525-mil
pin to pin) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 X 2048
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
This document contISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no
responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/22/01
1
IS62LV1288LL
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
WE
X
X
H
H
L
CE1
H
X
L
L
L
CE2
X
L
H
H
H
OE
X
X
H
L
X
I/O Operation
High-Z
High-Z
High-Z
D
OUT
D
IN
Vcc Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
ISSI
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
V
CC
T
BIAS
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Vcc related to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
Value
–0.5 to Vcc + 0.5
–0.3 to +3.6
–40 to +85
–65 to +150
0.7
Unit
V
V
°C
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, Vcc = 3.0V.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/22/01
3
IS62LV1288LL
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
CC
= Min., I
OH
= –1.0 mA
V
CC
= Min., I
OL
= 2.1 mA
Min.
2.2
—
2.0
–0.2
–1
–1
Max.
ISSI
Unit
V
V
V
V
µA
µA
—
0.4
V
CC
+ 0.2
0.4
1
1
®
GND
≤
V
IN
≤
V
CC
GND
≤
V
OUT
≤
V
CC
Notes:
1. V
IL
= –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
I
SB
1
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
CE
= V
IL
I
OUT
= 0 mA, f = f
MAX
Com.
Ind.
-45
Min. Max.
—
—
—
—
—
—
35
40
0.4
1
8
10
-55
Min. Max.
—
—
—
—
—
—
30
35
0.4
1
8
10
-70
Min. Max.
—
—
—
—
—
—
25
30
0.4
1
8
10
Unit
mA
mA
V
CC
= Max.,
Com.
V
IN
= V
IH
or V
IL
,
CE1
≥
V
IH
Ind.
or CE2
≤
V
IL
, f = 0
V
CC
= Max., f = 0
Com.
CE1
≥
V
CC
– 0.2V,
Ind.
CE2
≤
0.2V,
or V
IN
≥
V
CC
– 0.2V, V
IN
≤
0.2V
I
SB
2
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/22/01
IS62LV1288LL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-45
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1
Access Time
CE2 Access Time
OE
Access Time
OE
to Low-Z Output
Min.
45
—
10
—
—
—
0
0
5
5
0
Max.
—
45
—
45
45
20
—
15
—
—
15
Min.
55
—
10
—
—
—
5
0
7
7
0
-55
Max.
—
55
—
55
55
25
—
20
—
—
20
Min.
70
—
10
—
—
—
5
0
10
10
0
-70
ISSI
Max.
—
70
—
70
70
35
—
25
—
—
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
Unit
t
RC
t
AA
t
OHA
t
ACE
1
t
ACE
2
t
DOE
t
LZOE
(2)
t
HZOE
(2)
OE
to High-Z Output
t
LZCE
1
(2)
CE1
to Low-Z Output
t
LZCE
2
(2)
CE2 to Low-Z Output
t
HZCE
(2)
CE1
or CE2 to High-Z Output
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
See Figures 1 and 2
AC TEST LOADS
1213
Ω
3.0V
3.0V
1213
Ω
OUTPUT
30 pF
Including
jig and
scope
1378
Ω
OUTPUT
5 pF
Including
jig and
scope
1378
Ω
Figure 1.
Figure 2.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/22/01
5
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