IS62LV12816BLL
128K x 16 LOW VOLTAGE, ULTRA
LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
– 120 mW (typical) operating
– 6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 2.7V-3.45V V
CC
power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA (6mm x 8mm)
ISSI
DESCRIPTION
®
FEBRUARY 2001
The
ISSI
IS62LV12816BLL is a high-speed, 2,097,152-bit
static RAM organized as 131,072 words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-performance
and low power consumption devices.
When
CE
is HIGH (deselected) or when
CE
is low and
both
LB
and
UB
are HIGH, the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE.
The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS62LV12816BLL is packaged in the JEDEC standard
44-pin TSOP (Type II) and 48-pin mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
03/07/01
1
IS62LV12816BLL
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
2.7V - 3.45V
2.7V - 3.45V
ISSI
®
1
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
V
CC
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Vcc Related to GND
Storage Temperature
Power Dissipation
Value
–0.5 to Vcc+0.5
–40 to +85
–0.3 to +3.6
–65 to +150
1.0
Unit
V
°C
V
°C
W
3
4
5
6
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL(1)
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
GND
≤
V
IN
≤
V
CC
GND
≤
V
OUT
≤
V
CC
, Outputs Disabled
Test Conditions
V
CC
= Min., I
OH
= –1 mA
V
CC
= Min., I
OL
= 2.1 mA
Min.
2.0
—
2.2
–0.2
–1
–1
Max.
—
0.4
V
CC
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
7
8
9
10
Notes:
1. V
IL
(min.) = –2.0V for pulse width less than 10 ns.
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
11
12
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
03/07/01
3
IS62LV12816BLL
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
Vcc Dynamic Operating
Supply Current
I
SB
1
TTL Standby Current
(TTL Inputs)
OR
ULB Control
V
CC
= Max., V
IN
= V
IH
or V
IL
CE
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
CC
= Max.,
CE
≥
V
CC
– 0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
Com.
Ind.
—
—
5
5
—
—
5
5
—
—
5
5
Test Conditions
V
CC
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
CC
= Max.,
V
IN
= V
IH
or V
IL
CE
≥
V
IH
, f = 0
-55
Min. Max.
— 40
— 45
— 0.4
— 1.0
-70
Min. Max.
— 30
— 35
— 0.4
— 1.0
ISSI
Com.
Ind.
Com.
Ind.
-100
Min. Max.
— 20
— 25
— 0.4
— 1.0
Unit
mA
mA
®
1
2
3
I
SB
2
CMOS Standby
Current (CMOS Inputs)
µA
4
5
6
7
OR
ULB Control
V
CC
= Max.,
CE
= V
IL
V
IN
≤
0.2V, f = 0;
UB
/
LB
= V
CC
– 0.2V
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
LB, UB
Access Time
LB, UB
to High-Z Output
LB, UB
to Low-Z Output
-55
Min. Max.
55
—
10
—
—
—
5
0
10
—
0
0
—
55
—
55
30
20
—
20
—
55
25
—
-70
Min. Max.
70
—
10
—
—
—
5
0
10
—
0
0
—
70
—
70
35
25
—
25
—
70
25
—
-100
Min. Max.
100
—
15
—
—
—
5
0
10
—
0
0
—
100
—
100
50
30
—
30
—
100
35
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2)
t
LZCE
(2)
t
BA
t
HZB
t
LZB
8
9
10
11
12
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of
0.4 to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
03/07/01
5
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