IDT74ALVCH16843
3.3V CMOS 18-BIT INTERFACE D-TYPE LATCH
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT
BUS-INTERFACE D-TYPE
LATCH WITH 3-STATE
OUTPUTS AND BUS-HOLD
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
– Extended commercial range of – 40°C to + 85°C
– V
CC
= 3.3V ± 0.3V, Normal Range
– V
CC
= 2.7V to 3.6V, Extended Range
– V
CC
= 2.5V ± 0.2V
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCH16843:
– High Output Drivers: ±24mA
– Suitable for heavy loads
–
–
–
IDT74ALVCH16843
DESCRIPTION:
The ALVCH16843 is built using advanced dual metal CMOS technol-
ogy. This device has two 9-bit D-type latches featuring separate D-type
inputs for each latch and 3-state outputs for bus oriented applications.
The two sections of each register are controlled independently by the
latch enable (LE), clear (CLR), preset (PRE) and output enable (OE)
control pins.
When OE is low, the data in the registers appear at the outputs.
When OE is high, the outputs are in the high impedance OFF state.
Operation of the OE input does not affect the state of the flip-flops.
The ALVCH16843 has been designed with a ±24mA output driver.
This driver is capable of driving a moderate to heavy load while
maintaining speed performance.
The ALVCH16843 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents
floating inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
•
3.3V High Speed Systems
•
3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
1D x
2D x
D
CLR
PRE
LE
D
CLR
PRE
LE
1C LR
1P R E
1
55
28
2C LR
2P R E
30
29
2L E
27
2O E
1L E
56
1O E
2
1Q x
T O E IG H T O T H E R C H A N N E LS
T O E IG H T O T H E R C H A N N E LS
2Q x
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-5154/-
IDT74ALVCH16843
3.3V CMOS 18-BIT INTERFACE D-TYPE LATCH
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
1CLR
1OE
1Q
0
GND
1Q
1
1Q
2
V
CC
1Q
3
1Q
4
1Q
5
GND
1Q
6
1Q
7
1Q
8
2Q
0
2Q
1
2Q
2
GND
2Q
3
2Q
4
2Q
5
V
CC
2Q
6
2Q
7
GND
2Q
8
2OE
2CLR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
SO56-1
SO56-2 43
SO56-3
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1LE
1PRE
1D
0
GND
1D
1
1D
2
V
CC
1D
3
1D
4
1D
5
GND
1D
6
1D
7
1D
8
2D
0
2D
1
2D
2
GND
2D
3
2D
4
2D
5
V
CC
2D
6
2D
7
GND
2D
8
2PRE
2LE
ABSOLUTE MAXIMUM RATING
Symbol
V
TERM(2)
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Description
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
I
>
V
CC
Continuous Clamp Current, V
O
< 0
Continuous Current through
each V
CC
or GND
(1)
Unit
V
V
°C
mA
mA
mA
mA
NEW16link
Max.
– 0.5 to + 4.6
– 0.5 to
V
CC
+ 0.5
– 65 to + 150
– 50 to + 50
± 50
– 50
±100
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
CAPACITANCE
(T
A
= +25
o
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
5
7
7
Max.
7
9
9
Unit
pF
pF
pF
NEW16link
NOTE:
1. As applicable to the device type.
SSOP/
TSSOP/TVSOP
TOP VIEW
FUNCTION TABLE
(1)
Inputs
XPRE
L
H
H
H
H
X
XCLR
X
L
H
H
H
X
XOE
L
L
L
L
L
H
XLE
X
X
H
H
L
X
XDx
X
X
L
H
X
X
Output
XQx
H
L
L
H
Qo
Z
PIN DESCRIPTION
Symbol
XCLR
XOE
XPRE
XLE
XDx
XQx
GND
Vcc
Description
Clear input (Active LOW)
Output enable input (Active LOW)
Preset input (Active LOW)
Latch enable input
Data inputs
(1)
3-State Data outputs
Ground (0V)
Positive supply voltage
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance "off" state
2. Q
0
= Level of Q before the indicated steady-state input conditions were
established
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs,
outputs, or I/Os.
c
2
IDT74ALVCH16843
3.3V CMOS 18-BIT INTERFACE D-TYPE LATCH
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input HIGH Current
Input LOW Current
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
One input at V
CC
−
0.6V,
other inputs at V
CC
or GND
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= V
CC
V
I
= GND
V
O
= V
CC
V
O
= GND
Min.
1.7
2
—
—
—
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
—
—
– 0.7
100
0.1
Max.
—
—
0.7
0.8
±5
±5
± 10
± 10
– 1.2
—
40
µA
µA
V
mV
µA
µA
V
Unit
V
Quiescent Power Supply
Current Variation
—
—
750
µA
NEW16link
NOTE:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
I
BHH
I
BHL
I
BHH
I
BHL
I
BHHO
I
BHLO
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
NEW16link
Parameter
(1)
Bus-Hold Input Sustain Current
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 3.6V
Test Conditions
V
I
= 2.0V
V
I
= 0.8V
V
I
= 1.7V
V
I
= 0.7V
V
I
= 0 to 3.6V
Min.
– 75
75
– 45
45
—
Typ.
(2)
—
—
—
—
—
Max.
—
—
—
—
± 500
Unit
µA
µA
µA
3
IDT74ALVCH16843
3.3V CMOS 18-BIT INTERFACE D-TYPE LATCH
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
NEW16link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to + 85°C.
OPERATING CHARACTERISTICS, T
A
= 25
o
C
V
CC
= 2.5V ± 0.2V
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance
Outputs enabled
Power Dissipation Capacitance
Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
16
4
V
CC
= 3.3V ± 0.3V
Typical
18
6
Unit
pF
pF
4
IDT74ALVCH16843
3.3V CMOS 18-BIT INTERFACE D-TYPE LATCH
EXTENDED COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS
(1)
Symbol
Parameter
Propagation Delay
XDx to XQx
Propagation Delay
XLE to XQx
Propagation Delay
XPRE to XQx
Propagation Delay
xCLR to XQx
3-State Output Enable time
XOE to XQx
3-State Output Disable time
XOE to XQx
Set-up time XDx to XLE
Hold time XDx to XLE
XLE pulse width HIGH
t
W
XPRE pulse width LOW
XCLR pulse width LOW
t
REM
Recovery time XPRE to XLE
Recovery time XCLR to XLE
t
SK(0)
Output Skew
(2)
VCC = 2.5V ± 0.2V
Min.
1
1
1
1
1
1.1
0.5
0.9
1.5
1.5
1.5
1.5
1.5
—
Max.
4.3
4.6
4.8
4.8
5.8
4.3
—
—
—
—
—
—
—
—
VCC = 2.7V
Min.
1
1
1
1
1
1.3
0.5
0.9
1.5
1.5
1.5
1.5
1.5
—
Max.
4
3.9
4.5
4.3
5.3
4.4
—
—
—
—
—
—
—
—
VCC = 3.3V ± 0.3V
Min.
1
1
1
1
1
1.3
0.5
0.9
1.5
1.5
1.5
1.5
1.5
—
Max.
3.5
3.5
3.8
3.9
4.4
4
—
—
—
—
—
—
—
500
ns
ns
ps
ns
ns
ns
ns
ns
Unit
t
PHL
t
PLH
ns
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
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