MIC2582/MIC2583
Single Channel Hot Swap Controllers
General Description
The MIC2582 and MIC2583 are single channel positive
voltage hot swap controllers designed to allow the safe
insertion of boards into live system backplanes. The
MIC2582 and MIC2583 are available in 8-pin SOIC and
16-pin QSOP packages, respectively. Using a few external
components and by controlling the gate drive of an
external N-Channel MOSFET device, the MIC2582/83
provide inrush current limiting and output voltage slew rate
control in harsh, critical power supply environments.
Additionally, a circuit breaker function will latch the output
MOSFET off if the current limit threshold is exceeded for a
determined period. The MIC2583R option includes an
auto-restart function upon detecting an over current
condition.
Datasheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Features
•
MIC2582:
Pin-for-pin functional equivalent to the LTC1422
•
2.3V to 13.2V supply voltage operation
•
Surge voltage protection up to 20V
•
Current regulation limits inrush current regardless of load
capacitance
•
Programmable inrush current limiting
•
Electronic circuit breaker
•
Optional dual-level overcurrent threshold detects
excessive load faults
•
Fast response to short circuit conditions (<1µs)
•
Programmable output under-voltage detection
•
Under-voltage Lockout (UVLO) protection
•
Auto-restart function (MIC2583R)
•
Power-On Reset and Power-Good status outputs
(Power-Good for the MIC2583 and MIC2583R only)
•
/FAULT status output (MIC2583 and MIC2583R)
Applications
•
RAID systems
•
Base stations
•
PC board hot swap insertion and removal
•
+12V backplanes
•
Network switches
___________________________________________________________________________________________________________
Typical Applications
Figure 1. MIC2583/83R Typical Application Circuit
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2009
M9999-043009-C
Micrel, Inc.
MIC2582/MIC2583
Ordering Information
Part Number
Standard
MIC2582-JBM
Pb-Free
MIC2582-xYM
x = J, 100mV
x = J1, Off
x = M, Off
MIC2583-xBQS
MIC2583-xYQS
x = J, 100mV
x = K*, 150mV
x = L*, 200mV
x = M*, Off
MIC2583R-xBQS
MIC2583R-xYQS
x = J, 100mV
x = K*, 150mV
x = L*, 200mV
x = M*, Off
Note:
* Contact factory for availability.
Fast Circuit Breaker Threshold
Circuit Breaker
Latched off
Package
8-Pin SOIC
Latched off
16-pin QSOP
Auto-retry
16-pin QSOP
Pin Configuration
8-Pin SOIC (M)
16-Pin QSOP (QS)
April 2009
2
M9999-043009-C
Micrel, Inc.
MIC2582/MIC2583
Pin Description
Pin Number
8-Pin SOIC
1
Pin Number
16-Pin QSOP
1
Pin Name
/POR
Pin Name
Power-On Reset Output: Open drain N-channel device, Active Low. This pin
remains asserted during start-up until a time period (t
POR
) after the FB pin
voltage rises above the power-good threshold (VFB). The timing capacitor C
POR
determines t
POR
. When the output voltage monitored at the FB pin falls below
V
FB
, /POR is asserted for a minimum of one timing cycle (t
POR
). The /POR pin
requires a pull-up resistor (10kΩ minimum) to VCC.
ON Input: Active High. The ON pin, an input to a Schmitt-triggered comparator
used to enable/disable the controller, is compared to a 1.24V reference with
50mV of hysteresis. When a logic high is applied to the ON pin (V
ON
> 1.24V), a
start-up sequence begins when the GATE pin starts ramping up towards its final
operating voltage. When the ON pin receives a logic low signal (V
ON
< 1.19V),
the GATE pin is grounded and /FAULT remains high if VCC is above the UVLO
threshold. ON must be low for 20µs in order to initiate a start-up sequence.
Additionally, toggling the ON pin LOW to HIGH resets the circuit breaker.
Power-On Reset Timer: A capacitor connected between this pin and ground sets
the supply contact start-up delay (t
START
) and the power-on reset interval (t
POR
).
When VCC rises above the UVLO threshold, the capacitor connected to C
POR
begins to charge. When the voltage at CPOR crosses 0.3V, the start-up
threshold (V
START
), a start cycle is initiated if ON is asserted while capacitor C
POR
is immediately discharged to ground. When the voltage at FB rises above V
FB
,
capacitor C
POR
begins to charge again. When the voltage at CPOR rises above
the power-on reset delay threshold (V
TH
), the timer resets by pulling CPOR to
ground, and /POR is de-asserted. If C
POR
is left open, then t
START
defaults to
20µs.
Ground Connection: Tie to analog ground.
Power-Good Threshold Input (Under-voltage Detect): This input is internally
compared to a 1.24V reference with 30mV of hysteresis. An external resistive
divider may be used to set the voltage at this pin. If this input momentarily goes
below 1.24V, then /POR is activated for one timing cycle, t
POR
, indicating an
output under-voltage condition. The /POR signal de-asserts one timing cycle
after the FB pin exceeds the power-good threshold by 30mV. A 5µs filter on this
pin prevents glitches from inadvertently activating this signal.
Gate Drive Output: Connects to the gate of an external N-channel MOSFET. An
internal clamp ensures that no more than 9V is applied between the GATE pin
and the source of the external MOSFET. The GATE pin is immediately brought
low when either the circuit breaker trips or an under-voltage lockout condition
occurs.
Circuit Breaker Sense Input: A resistor between this pin and VCC sets the
current limit threshold. Whenever the voltage across the sense resistor exceeds
the slow trip current limit threshold (V
TRIPSLOW
), the GATE voltage is adjusted to
ensure a constant load current. If V
TRIPSLOW
(50mV) is exceeded for longer than
time period t
OCSLOW
, then the circuit breaker is tripped and the GATE pin is
immediately pulled low. If the voltage across the sense resistor exceeds the fast
trip circuit breaker threshold, V
TRIPFAST
, at any point due to fast, high amplitude
power supply faults, then the GATE pin is immediately brought low without delay.
To disable the circuit breaker, the SENSE and VCC pins can be tied together.
The default V
TRIPFAST
for either device is 100mV. Other fast trip thresholds are
available: 150mV, 200mV, or OFF (V
TRIPFAST
disabled). Please contact factory for
availability of other options.
Positive Supply Input: 2.3V to 13.2V. The GATE pin is held low by an internal
under-voltage lockout circuit until VCC exceeds a threshold of 2.2V. If VCC
exceeds 13.2V, an internal shunt regulator protects the chip from transient
voltages up to 20V at the VCC and SENSE pins.
2
3
ON
3
4
CPOR
4
5
7, 8
12
GND
FB
6
14
GATE
7
15
SENSE
8
16
VCC
April 2009
3
M9999-043009-C
Micrel, Inc.
MIC2582/MIC2583
Pin Number
8-Pin SOIC
n/a
Pin Number
16-Pin QSOP
2
Pin Name
PWRGD
Pin Name
Power-Good Output: Open drain N-channel device, Active High. When the
voltage at the FB pin is lower than 1.24V, PWRGD output is held low. When the
voltage at the FB pin exceeds 1.24V, then PWRGD is asserted immediately. The
PWRGD pin requires a pull-up resistor (10kΩ minimum) to VCC.
Current Limit Response Timer: A capacitor connected to this pin defines the
period of time (t
OCSLOW
) in which an over current event must last to signal a fault
condition and trip the circuit breaker. If no capacitor is connected, then t
OCSLOW
defaults to 5µs.
Circuit Breaker Fault Status Output: Open drain N-channel device, Active Low.
The /FAULT pin is asserted when the circuit breaker trips due to an over current
condition or when an under-voltage lockout condition exists. The/FAULT pin
requires a pull-up resistor (10kΩ minimum) to VCC.
Discharge Output: When the MIC2583/83R is turned off, a 500Ω internal resistor
at this output allows the discharging of any load capacitance to ground.
No internal connection.
n/a
5
CFILTER
n/a
11
/FAULT
n/a
n/a
13
6, 9, 10
DIS
NC
April 2009
4
M9999-043009-C
Micrel, Inc.
MIC2582/MIC2583
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
)....................................... –0.3V to 20V
/POR, /FAULT, PWRGD pins.......................... –0.3V to 15V
SENSE pin ............................................ –0.3V to V
CC
+0.3V
ON pin
............................................ –0.3V to V
CC
+0.3V
GATE pin ..................................................... –0.3V to 20V
FB Input pins ..................................................... –0.3V to 6V
Junction Temperature .............................................. +125°C
Lead Temperature
Standard Package (-JBM and –xBQS)
(IR Reflow, Peak Temperature) ..240°C + 0°C/-5°C
Pb-Free Package (-xYM or –xYQS)
(IR Reflow, Peak Temperature) ..260°C + 0°C/-5°C
EDS Rating
Human body model.................................................. 2kV
Machine model ......................................................100V
Operating Ratings
(2)
Supply Voltage (V
CC
).................................. +2.3V to +13.2V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
Junction Thermal Resistance
SOIC (θ
JA
) ........................................................163°C/W
QSOP (θ
JA
) ......................................................112°C/W
Electrical Characteristics
(3)
V
CC
= 5.0V, T
A
= 25°C unless noted.
Bold
values indicate –40°C
≤
T
A
≤
+85°C.
Symbol
V
CC
I
CC
V
TRIP
Parameter
Supply Voltage
Supply Current
Circuit Breaker Trip Voltage
(Current Limit Threshold)
V
ON
= 2V
V
TRIP
= V
CC
−
V
SENSE
V
TRIPSLOW
V
TRIPFAST
(MIC2582-Jxx)
V
TRIPFAST
(MIC2583/83R) X = J
X=K
X=L
V
GS
I
GATE
I
GATEOFF
External Gate Drive
GATE Pin Pull-Up Current
GATE Pink Sink Current
V
GATE
−
V
CC
V
CC
> 3V
V
CC
= 2.3V
Start Cycle, V
GATE
= 0V, V
CC
= 13.2V
V
CC
= 2.3V
V
GATE
> 1V
/FAULT = 0
(MIC2583/83R only)
I
TIMER
Current Limit/Overcurrent Timer
(CFILTER) Current
(MIC2583/83R)
Power-On-Reset Timer Current
POR Delay and Overcurrent
Timer (CFILTER) Threshold
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
ON Pin Threshold Voltage
ON Pin Hysteresis
2.3V
≤
V
CC
≤
13.2V
ON rising
ON falling
V
ONHYS
1.19
1.14
V
CC
= 13.2V, Note 4
V
CC
= 2.3V, Note 4
Turn Off
−8.5
4.5
−3.5
0.5
1.19
2.1
1.90
85
130
175
7
3.5
−30
−26
42
Condition
Min
2.3
1.5
50
100
100
150
200
8
4.8
17
17
100
50
110
−6.5
6.5
2.5
1.3
1.245
2.2
2.05
150
1.24
1.19
50
1.29
1.24
1.30
2.3
2.20
−4.5
8.5
−1.5
110
170
225
9
6.5
−8
−8
Typ
Max
13.2
2.5
59
mV
mV
mV
mV
V
V
µA
µA
µA
µA
µA
µA
µA
µA
mA
V
V
V
mV
V
V
mV
Units
V
mA
V
CC
−
V
SENSE
> V
TRIPSLOW
(timer on)
V
CC
−
V
SENSE
> V
TRIPSLOW
(timer off)
Timer on
Timer off
V
CPOR
rising
V
CFILTER
rising (MIC2583/83R only)
V
CC
rising
V
CC
falling
I
CPOR
V
TH
V
UV
V
UVHYS
V
ON
April 2009
5
M9999-043009-C
FPGA/CPLD
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