SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SN8F2270B Series
USER’S MANUAL
SN8F2271B
SN8F22711B
SN8F22721B
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
Page 1
Version 1.2
SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
AMENDMENT HISTORY
Version
VER1.0
VER1.1
VER1.2
Date
2009/3/23
2009/6/17
2009/7/9
Description
version 1.0
Modify SN8F22721S/X/K to SN8F22721S/X/P
Modify PWM output pin to p5.3.
SONiX TECHNOLOGY CO., LTD
Page 2
Version 1.2
SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
Table of Content
AMENDMENT HISTORY..........................................................................................................................
2
1
PRODUCT OVERVIEW......................................................................................................................... 7
1.1 FEATURES .............................................................................................................................................. 7
1.2 SYSTEM BLOCK DIAGRAM ................................................................................................................ 8
1.3 PIN ASSIGNMENT ................................................................................................................................. 9
1.4 PIN DESCRIPTIONS ............................................................................................................................. 10
1.5 PIN CIRCUIT DIAGRAMS ................................................................................................................... 11
2
CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 12
2.1 MEMORY MAP ..................................................................................................................................... 12
2.1.1 PROGRAM MEMORY (ROM) ........................................................................................................ 12
2.1.1.1 RESET VECTOR (0000H) ...................................................................................................... 12
2.1.1.2 INTERRUPT VECTOR (0008H)............................................................................................. 13
2.1.1.3 LOOK-UP TABLE DESCRIPTION........................................................................................ 15
2.1.1.4 JUMP TABLE DESCRIPTION ............................................................................................... 17
2.1.1.5 CHECKSUM CALCULATION .............................................................................................. 19
2.1.2 CODE OPTION TABLE .................................................................................................................. 20
2.1.3 DATA MEMORY (RAM).................................................................................................................. 21
2.1.4 SYSTEM REGISTER........................................................................................................................ 22
2.1.4.1 SYSTEM REGISTER TABLE ................................................................................................ 22
2.1.4.2 SYSTEM REGISTER DESCRIPTION ................................................................................... 22
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER........................................................................... 23
2.1.4.4 ACCUMULATOR ................................................................................................................... 25
2.1.4.5 PROGRAM FLAG ................................................................................................................... 26
2.1.4.6 PROGRAM COUNTER .......................................................................................................... 27
2.1.4.7 Y, Z REGISTERS .................................................................................................................... 30
2.1.4.8 R REGISTERS ......................................................................................................................... 30
2.2 ADDRESSING MODE .......................................................................................................................... 31
2.2.1 IMMEDIATE ADDRESSING MODE.............................................................................................. 31
2.2.2 DIRECTLY ADDRESSING MODE ................................................................................................. 31
2.2.3 INDIRECTLY ADDRESSING MODE ............................................................................................. 31
2.3 STACK OPERATION............................................................................................................................ 32
2.3.1 OVERVIEW ..................................................................................................................................... 32
2.3.2 STACK REGISTERS ........................................................................................................................ 33
2.3.3 STACK OPERATION EXAMPLE.................................................................................................... 34
3
RESET ..................................................................................................................................................... 35
3.1 OVERVIEW ........................................................................................................................................... 35
3.2 POWER ON RESET............................................................................................................................... 36
3.3 WATCHDOG RESET ............................................................................................................................ 36
3.4 BROWN OUT RESET ........................................................................................................................... 37
3.4.1 BROWN OUT DESCRIPTION ........................................................................................................ 37
3.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION............................................................... 38
3.4.3 BROWN OUT RESET IMPROVEMENT......................................................................................... 39
3.5 EXTERNAL RESET .............................................................................................................................. 40
3.6 EXTERNAL RESET CIRCUIT ............................................................................................................. 40
3.6.1 Simply RC Reset Circuit .................................................................................................................. 40
SONiX TECHNOLOGY CO., LTD
Page 3
Version 1.2
SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
3.6.2 Diode & RC Reset Circuit ............................................................................................................... 41
3.6.3 Zener Diode Reset Circuit ............................................................................................................... 41
3.6.4 Voltage Bias Reset Circuit............................................................................................................... 42
3.6.5 External Reset IC............................................................................................................................. 42
4
SYSTEM CLOCK .................................................................................................................................. 43
4.1 OVERVIEW ........................................................................................................................................... 43
4.2 CLOCK BLOCK DIAGRAM................................................................................................................. 43
4.3 OSCM REGISTER ................................................................................................................................. 44
4.4 SYSTEM HIGH CLOCK ....................................................................................................................... 45
4.4.1 INTERNAL HIGH RC...................................................................................................................... 45
4.5 SYSTEM LOW CLOCK ........................................................................................................................ 46
4.5.1 SYSTEM CLOCK MEASUREMENT ............................................................................................... 46
5
SYSTEM OPERATION MODE ........................................................................................................... 47
5.1 OVERVIEW ........................................................................................................................................... 47
5.2 SYSTEM MODE SWITCHING EXAMPLE ......................................................................................... 48
5.3 WAKEUP ............................................................................................................................................... 50
5.3.1 OVERVIEW ..................................................................................................................................... 50
5.3.2 WAKEUP TIME............................................................................................................................... 50
6
INTERRUPT........................................................................................................................................... 51
6.1 OVERVIEW ........................................................................................................................................... 51
6.2 INTEN INTERRUPT ENABLE REGISTER ......................................................................................... 52
6.3 INTRQ INTERRUPT REQUEST REGISTER....................................................................................... 53
6.4 GIE GLOBAL INTERRUPT OPERATION .......................................................................................... 54
6.5 PUSH, POP ROUTINE........................................................................................................................... 54
6.6 INT0 (P0.0) & INT1 (P0.1) INTERRUPT OPERATION....................................................................... 55
6.7 T0 INTERRUPT OPERATION.............................................................................................................. 57
6.8 TC0 INTERRUPT OPERATION ........................................................................................................... 58
6.9 USB INTERRUPT OPERATION .......................................................................................................... 59
6.10 WAKEUP INTERRUPT OPERATION ............................................................................................... 60
6.11 SIO INTERRUPT OPERATION.......................................................................................................... 61
6.12 MULTI-INTERRUPT OPERATION ................................................................................................... 62
7
I/O PORT ................................................................................................................................................ 63
7.1 I/O PORT MODE ................................................................................................................................... 63
7.2 I/O PULL UP REGISTER ...................................................................................................................... 64
7.3 I/O PORT DATA REGISTER ................................................................................................................ 65
7.4 I/O PORT1 WAKEUP CONTROL REGISTER..................................................................................... 66
8
TIMERS .................................................................................................................................................. 67
8.1 WATCHDOG TIMER............................................................................................................................ 67
8.2 TIMER 0 (T0) ......................................................................................................................................... 69
8.2.1 OVERVIEW ..................................................................................................................................... 69
8.2.2 T0M MODE REGISTER.................................................................................................................. 69
8.2.3 T0C COUNTING REGISTER.......................................................................................................... 70
8.2.4 T0 TIMER OPERATION SEQUENCE ............................................................................................ 71
8.3 TIMER/COUNTER 0 (TC0)................................................................................................................... 72
8.3.1 OVERVIEW ..................................................................................................................................... 72
8.3.2 TC0M MODE REGISTER ............................................................................................................... 73
8.3.3 TC0C COUNTING REGISTER ....................................................................................................... 74
SONiX TECHNOLOGY CO., LTD
Page 4
Version 1.2
SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
8.3.4 TC0R AUTO-LOAD REGISTER ..................................................................................................... 75
8.3.5 TC0 CLOCK FREQUENCY OUTPUT (BUZZER) ......................................................................... 76
8.3.6 TC0 TIMER OPERATION SEQUENCE ......................................................................................... 77
8.4 PWM0 MODE ........................................................................................................................................ 78
8.4.1 OVERVIEW ..................................................................................................................................... 78
8.4.2 TCxIRQ and PWM Duty .................................................................................................................. 79
8.4.3 PWM Duty with TCxR Changing..................................................................................................... 80
8.4.4 PWM PROGRAM EXAMPLE ......................................................................................................... 81
9
UNIVERSAL SERIAL BUS (USB) ...................................................................................................... 82
9.1 OVERVIEW ........................................................................................................................................... 82
9.2 USB MACHINE ..................................................................................................................................... 82
9.3 USB INTERRUPT.................................................................................................................................. 82
9.4 USB ENUMERATION .......................................................................................................................... 83
9.5 USB REGISTERS .................................................................................................................................. 84
9.5.1 USB DEVICE ADDRESS REGISTER ............................................................................................. 84
9.5.2 USB STATUS REGISTER................................................................................................................ 84
9.5.3 USB DATA COUNT REGISTER ..................................................................................................... 85
9.5.4 USB ENABLE CONTROL REGISTER ............................................................................................ 85
9.5.5 USB endpoint’s ACK handshaking flag REGISTER ....................................................................... 85
9.5.6 USB endpoint’s NAK handshaking flag REGISTER ....................................................................... 86
9.5.7 USB ENDPOINT 0 ENABLE REGISTER ....................................................................................... 86
9.5.8 USB ENDPOINT 1 ENABLE REGISTER ....................................................................................... 87
9.5.9 USB ENDPOINT 2 ENABLE REGISTER ....................................................................................... 87
9.5.10 USB DATA POINTER REGISTER ................................................................................................ 88
9.5.11 USB DATA READ/WRITE REGISTER ......................................................................................... 88
9.5.12 USB ENDPOINT OUT TOKEN DATA BYTES COUNTER.......................................................... 88
9.5.13 UPID REGISTER .......................................................................................................................... 89
9.5.14 ENDPOINT TOGGLE BIT CONTROL REGISTER...................................................................... 89
10
SERIAL INPUT/OUTPUT TRANSCEIVER .................................................................................. 90
10.1 OVERVIEW ......................................................................................................................................... 90
10.2 SIOM MODE REGISTER .................................................................................................................... 93
10.3 SIOB DATA BUFFER ......................................................................................................................... 94
10.4 SIOR REGISTER DESCRIPTION....................................................................................................... 94
11
FLASH................................................................................................................................................. 95
11.1 OVERVIEW ......................................................................................................................................... 95
11.2 FLASH PROGRAMMING/ERASE CONTROL REGISTER ............................................................. 95
11.3 PROGRAMMING/ERASE ADDRESS REGISTER ........................................................................... 96
11.4 PROGRAMMING/ERASE DATA REGISTER .................................................................................. 97
11.4.1 F
LASH
I
N
-
SYSTEM
-
PROGRAMMING MAPPING ADDRESS
....................................................................... 97
12
13
13.1
13.2
13.3
14
14.1
14.2
INSTRUCTION TABLE ................................................................................................................... 98
DEVELOPMENT TOOL .................................................................................................................. 99
ICE (I
N
C
IRCUIT
E
MULATION
)........................................................................................................... 99
SN8F2270B EV-
KIT
....................................................................................................................... 100
SN8F2270B T
RANSITION
B
OARD
................................................................................................... 101
ELECTRICAL CHARACTERISTIC ............................................................................................ 102
ABSOLUTE MAXIMUM RATING .............................................................................................. 102
ELECTRICAL CHARACTERISTIC............................................................................................. 102
Page 5
SONiX TECHNOLOGY CO., LTD
Version 1.2
微控制器 MCU
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