Philips Semiconductors
Product specification
LCD column driver for dot matrix graphic
displays
1
FEATURES
2
APPLICATIONS
PCF8579
•
LCD column driver
•
Used in conjunction with the PCF8578, this device forms
part of a chip set capable of driving up to 40960 dots
•
40 column outputs
•
Selectable multiplex rates; 1 : 8, 1 : 16, 1 : 24 or 1 : 32
•
Externally selectable bias configuration, 5 or 6 levels
•
Easily cascadable for large applications (up to
32 devices)
•
1280-bit RAM for display data storage
•
Display memory bank switching
•
Auto-incremented data loading across hardware
subaddress boundaries (with PCF8578)
•
Power-on reset blanks display
•
Logic voltage supply range 2.5 to 6 V
•
Maximum LCD supply voltage 9 V
•
Low power consumption
•
I
2
C-bus interface
•
TTL/CMOS compatible
•
Compatible with most microcontrollers
•
Optimized pinning for single plane wiring in multiple
device applications (with PCF8578)
•
Space saving 56-lead plastic mini-pack and 64-pin
plastic low profile quad flat package
•
Compatible with chip-on-glass technology
•
I
2
C-bus address: 011110 SA0.
4
ORDERING INFORMATION
TYPE
NUMBER
PCF8579T
PCF8579U7
PCF8579H
•
Automotive information systems
•
Telecommunication systems
•
Point-of-sale terminals
•
Computer terminals
•
Instrumentation.
3
GENERAL DESCRIPTION
The PCF8579 is a low power CMOS LCD column driver,
designed to drive dot matrix graphic displays at multiplex
rates of 1 : 8, 1 : 16, 1 : 24 or 1 : 32. The device has
40 outputs and can drive 32
×
40 dots in a 32 row
multiplexed LCD. Up to 16 PCF8579s can be cascaded
and up to 32 devices may be used on the same I
2
C-bus
(using the two slave addresses). The device is optimized
for use with the PCF8578 LCD row/column driver.
Together these two devices form a general purpose LCD
dot matrix driver chip set, capable of driving displays of up
to 40960 dots. The PCF8579 is compatible with most
microcontrollers and communicates via a two-line
bidirectional bus (I
2
C-bus). To allow partial V
DD
shutdown
the ESD protection system of the SCL and SDA pins does
not use a diode connected to V
DD
. Communication
overheads are minimized by a display RAM with
auto-incremented addressing and display bank switching.
PACKAGE
NAME
VSO56
−
LQFP64
chip with bumps on tape
plastic low profile quad flat package; 64 leads; body 10
×
10
×
1.4 mm
DESCRIPTION
plastic very small outline package; 56 leads
VERSION
SOT190
−
SOT314-2
1997 Apr 01
3
Philips Semiconductors
Product specification
LCD column driver for dot matrix graphic
displays
5
BLOCK DIAGRAM
PCF8579
C39 - C0
17 - 56
(30 to 33, 35 to 64, 1 to 6)
VDD
V3
V4
V
LCD
12 (20)
14 (22)
15 (23)
16 (24)
COLUMN
DRIVERS
(1)
PCF8579
TEST
VSS
6 (12)
5 (11)
OUTPUT
CONTROLLER
Y DECODER
AND SENSING
AMPLIFIERS
32 x 40 BIT
DISPLAY RAM
DISPLAY
DECODER
POWER-ON
RESET
X DECODER
A3
A2
A1
A0
8 (14)
9 (16)
10 (17)
11 (18)
(9) 3
SUBADDRESS
COUNTER
RAM DATA POINTER
Y
X
TIMING
GENERATOR
SYNC
(10) 4
CLK
SCL
SDA
2 (8)
1 (7)
INPUT
FILTERS
(15, 19, 21, 25 to 29, 34)
13
n.c.
I
2
C-BUS
CONTROLLER
COMMAND
DECODER
7 (13)
MSA919
SA0
(1) Operates at LCD voltage levels, all other blocks operate at logic levels.
The pin numbers given in parenthesis refer to the LQFP64 package.
Fig.1 Block diagram.
1997 Apr 01
4
Philips Semiconductors
Product specification
LCD column driver for dot matrix graphic
displays
6
PINNING
PINS
SYMBOL
VSO56
SDA
SCL
SYNC
CLK
V
SS
TEST
SA0
A3 to A0
V
DD
n.c.
V
3
, V
4
V
LCD
C39 to C0
Note
1. Do not connect, this pin is reserved.
1
2
3
4
5
6
7
8 to 11
12
13
(1)
14 and 15
16
17 to 56
LQFP64
7
8
9
10
11
12
13
14, 16 to 18
20
15, 19, 21,25 to 29, 34
22 and 23
24
30 to 33, 35 to 64 and 1 to 6
PCF8579
DESCRIPTION
I
2
C-bus serial data input/output
I
2
C-bus serial clock input
cascade synchronization input
external clock input
ground (logic)
test pin (connect to V
SS
)
I
2
C-bus slave address input (bit 0)
I
2
C-bus subaddress inputs
supply voltage
not connected
LCD bias voltage inputs
LCD supply voltage
LCD column driver outputs
1997 Apr 01
5
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