IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
1-TO-10 CLOCK DRIVER
IDT74FCT807BT/CT
FEATURES:
•
•
•
•
•
•
•
•
•
•
•
•
0.5 MICRON CMOS Technology
Guaranteed low skew < 250ps (max.)
Very low duty cycle distortion < 350ps (max.)
High speed: propagation delay < 2.5ns (max.)
100MHz operation
TTL compatible inputs and outputs
TTL level output voltage swings
1:10 fanout
Output rise and fall time < 1.5ns (max)
Low input capacitance: 4.5pF typical
High drive: -32mA I
OH
, +48mA I
OL
Available in QSOP, SSOP, and SOIC packages
DESCRIPTION:
The FCT807T clock driver is built using advanced dual metal CMOS
technology. This low skew clock driver features 1:10 fanout, providing
minimal loading on the preceding drivers. The FCT807T offers low
capacitance inputs with hysteresis for improved noise margins. TTL level
outputs and multiple power and grounds reduce noise. The device also
features -32/48mA drive capability for driving low impedance traces.
FUNCTIONAL BLOCK DIAGRAM
O
1
PIN CONFIGURATION
IN
O
2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
10
O
9
GND
O
8
V
CC
O
7
GND
O
6
O
5
GND
O
1
O
3
V
CC
O
2
O
4
GND
O
3
O
5
V
CC
IN
O
4
O
6
GND
O
7
O
8
QSOP/ SOIC/ SSOP
TOP VIEW
O
9
O
10
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
c
2006
Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MAY 2010
DSC-4242/4
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–65 to +150
–60 to +120
Unit
V
°C
mA
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4.5
5.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
PIN DESCRIPTION
Pin Names
IN
Ox
Inputs
Outputs
Description
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0°C to +70°C, Industrial: T
A
= -40°C to +85°C, V
CC
= 5V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
I
OS
V
OH
V
OL
I
OFF
V
H
I
CCL
I
CCH
I
CCZ
Parameter
Input HIGH Level (Input pins)
Input LOW Level
Input HIGH Current (Input pins)
Input LOW Current (Input pins)
High Impedance Output Current
(3-State Output pins)
Input HIGH Current
Clamp Diode Voltage
Short Circuit Current
(4)
Output HIGH Voltage
Output LOW Voltage
Input/Output Power Off Leakage
Input Hysteresis for all inputs
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
O
≤
4.5V
—
V
CC
= Max., V
IN
= GND or V
CC
—
—
—
—
150
5
±1
—
500
µA
mV
µA
I
OH
= –15mA
I
OH
= –32mA
I
OL
= 48mA
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
–60
2.4
2
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
–120
3.3
3
0.3
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
–225
—
—
0.55
V
µA
V
mA
V
Unit
V
V
µA
µA
µA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition should not exceed one second.
2
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(3)
V
CC
= Max.
V
IN
= 3.4V
V
CC
= Max.
Input Toggling
50% Duty Cycle
Outputs Open
I
C
Total Power Supply Current
(5)
V
CC
= Max.
Input Toggling
50% Duty Cycle
Outputs Open
f
I
= 50MHz
NOTES:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at V
CC
= 5V, +25°C ambient.
Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
I
N
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
Test Conditions
(1)
Min.
—
Typ.
(2)
0.5
0.4
Max.
2
0.6
Unit
mA
mA/MHz
V
IN
= V
CC
V
IN
= GND
—
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
20
30.5
(4)
mA
—
20.3
31.3
(4)
3
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(3,4)
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Conditions
(1)
50Ω to V
CC
/2,
C
L
= 10pF
(See figure 1)
or 50Ω ac
termination,
C
L
= 10pF
(See figure 2)
f
≤
100MHz
Outputs connected in
groups of two
Min
.
(2)
1.3
—
—
—
—
—
Max
.
2.7
1.5
1.5
0.5
0.5
0.9
1.3
—
—
—
—
—
FCT807CT
Min
.
(2)
Max
.
2.5
1.5
1.5
0.25
0.35
0.65
Unit
ns
ns
ns
ns
ns
ns
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Conditions
(1)
C
L
= 30pF
f
≤
67MHz
(See figure 3)
Min
.
(2)
1.5
—
—
—
—
—
Max
.
3.8
1.5
1.5
0.5
0.5
0.9
1.5
—
—
—
—
—
FCT807CT
Min
.
(2)
Max
.
3.5
1.5
1.5
0.25
0.35
0.75
Unit
ns
ns
ns
ns
ns
ns
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
—
1
—
Conditions
(1)
C
L
= 30pF
f
≤
40MHz
(See figure 4)
Min
.
(2)
1.5
—
—
—
—
Max
.
3.8
1.5
1.5
0.5
0.6
FCT807CT
Min
.
(2)
1.5
—
—
—
—
Max
.
3.5
1.5
1.5
0.35
0.45
0.75
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay limits do not imply skew.
4
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
(3,4)
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Conditions
(1)
50Ω to V
CC
/2,
C
L
= 10pF
(See figure 1)
or 50Ω ac
termination,
C
L
= 10pF
(See figure 2)
f
≤
100MHz
Outputs connected in
groups of two
Min
.
(2)
1.3
—
—
—
—
—
Max
.
2.9
1.5
1.5
0.6
0.6
0.9
FCT807CT
Min
.
(2)
1.3
—
—
—
—
—
Max
.
2.7
1.5
1.5
0.35
0.45
0.65
Unit
ns
ns
ns
ns
ns
ns
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Conditions
(1)
C
L
= 30pF
f
≤
67MHz
(See figure 3)
Min
.
(2)
1.5
—
—
—
—
—
Max
.
4
1.5
1.5
0.6
0.6
0.9
1.5
—
—
—
—
—
FCT807CT
Min
.
(2)
Max
.
3.7
1.5
1.5
0.35
0.45
0.75
Unit
ns
ns
ns
ns
ns
ns
FCT807BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Conditions
(1)
C
L
= 30pF
f
≤
40MHz
(See figure 4)
Min
.
(2)
1.5
—
—
—
—
—
Max
.
4
1.5
1.5
0.6
0.7
1
1.5
—
—
—
—
—
FCT807CT
Min
.
(2)
Max
.
3.7
1.5
1.5
0.45
0.55
0.75
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay limits do not imply skew.
5
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
