74AHC2G08-Q100;
74AHCT2G08-Q100
Dual 2-input AND gate
Rev. 3 — 20 November 2015
Product data sheet
1. General description
The 74AHC2G08-Q100 and 74AHCT2G08-Q100 are high-speed Si-gate CMOS devices.
They provide two 2-input AND gates.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AHC2G08DP-Q100
74AHCT2G08DP-Q100
74AHC2G08DC-Q100
74AHCT2G08DC-Q100
74AHC2G08GD-Q100
74AHCT2G08GD-Q100
40 C
to +125
C
XSON8
40 C
to +125
C
VSSOP8
40 C
to +125
C
Name
TSSOP8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic extremely thin small outline package; no
leads; 8 terminals; body 3
2
0.5 mm
Version
SOT505-2
SOT765-1
SOT996-2
Type number
NXP Semiconductors
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
4. Marking
Table 2.
Marking
Marking code
[1]
A08
C08
A08
C08
A08
C08
Type number
74AHC2G08DP-Q100
74AHCT2G08DP-Q100
74AHC2G08DC-Q100
74AHCT2G08DC-Q100
74AHC2G08GD-Q100
74AHCT2G08GD-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74AHC_AHCT2G08_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 20 November 2015
2 of 15
NXP Semiconductors
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT996-2 (XSON8)
6.2 Pin description
Table 3.
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
CC
Pin description
Pin
1, 5
2, 6
4
7, 3
8
Description
data input
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Input
nA
L
L
H
H
[1]
Function table
[1]
Output
nB
L
H
L
H
nY
L
L
L
H
H = HIGH voltage level; L = LOW voltage level.
74AHC_AHCT2G08_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 20 November 2015
3 of 15
NXP Semiconductors
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+7.0
+7.0
-
20
25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
C
mW
V
I
<
0.5
V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
20
-
-
-
75
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8 package: above 45
C
the value of P
tot
derates linearly with 2.4 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5.0 V
0.5 V
Conditions
74AHC2G08-Q100
Min
2.0
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
74AHCT2G08-Q100
Min
4.5
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
C
ns/V
ns/V
Unit
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC2G08-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
1.5
2.1
3.85
-
-
-
-
-
-
1.5
2.1
3.85
-
-
-
1.5
2.1
3.85
-
-
-
V
V
V
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
74AHC_AHCT2G08_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 20 November 2015
4 of 15
NXP Semiconductors
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IL
LOW-level
input voltage
Conditions
Min
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
50 A;
V
CC
= 2.0 V
I
O
=
50 A;
V
CC
= 3.0 V
I
O
=
50 A;
V
CC
= 4.5 V
I
O
=
4.0
mA; V
CC
= 3.0 V
I
O
=
8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
25
C
Typ
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
1.5
Max
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
1.0
10
40 C
to +85
C 40 C
to +125
C
Unit
Min
-
-
-
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
Max
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
10
Min
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
Max
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
pF
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
74AHCT2G08-Q100
V
IH
V
IL
V
OH
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
50 A
I
O
=
8.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
A
I
O
= 8.0 mA
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
4.4
3.94
-
-
-
-
-
4.5
-
0
-
-
-
-
-
-
0.1
0.36
0.1
1.0
1.35
4.4
3.8
-
-
-
-
-
-
-
0.1
0.44
1.0
10
1.5
4.4
3.70
-
-
-
-
-
-
-
0.1
0.55
2.0
40
1.5
V
V
V
V
A
A
mA
V
OL
I
I
I
CC
I
CC
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
C
I
-
1.5
10
-
10
-
10
pF
74AHC_AHCT2G08_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 20 November 2015
5 of 15
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