INTEGRATED CIRCUITS
74LVT16374A
3.3V LVT 16-bit edge-triggered D-type
flip-flop (3-State)
Product data sheet
Supersedes data of 2002 Nov 01
2004 Sep 16
Philips
Semiconductors
Philips Semiconductors
Product data sheet
3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74LVT16374A
FEATURES
•
16-bit edge-triggered flip-flop
•
3-State buffers
•
Output capability: +64 mA/–32 mA
•
TTL input and output switching levels
•
Input and output interface capability to systems at 5 V supply
•
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74LVT16374A is a high-performance BiCMOS product
designed for V
CC
operation at 3.3 V.
This device is a 16-bit edge-triggered D-type flip-flop featuring
non-inverting 3-State outputs. The device can be used as two 8-bit
flip-flops or one 16-bit flip-flop. On the positive transition of the clock
(CP), the Q outputs of the flip-flop take on the logic levels set up at
the D inputs.
•
Live insertion/extraction permitted
•
Power-up reset
•
Power-up 3-State
•
No bus current loading when output is tied to 5 V bus
•
Latch-up protection exceeds 500 mA per JEDEC Std 17
•
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
nCP to nQx
Input capacitance
Output pin capacitance
Total supply current
C
L
= 50 pF;
V
CC
= 3.3 V
V
I
= 0 V or 3.0 V
Outputs disabled; V
O
= 0 V or 3.0 V
Outputs disabled; V
CC
= 3.6 V
CONDITIONS
T
amb
= 25
°C
TYPICAL
2.9
3
9
70
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
Type number
Package
Name
74LVT16374ADL
74LVT16374ADGG
74LVT16374AEV
SSOP48
TSSOP48
VFBGA56
Description
plastic shrink small outline package; 48 leads; body width 7.5 mm
plastic thin shrink small outline package; 48 leads; body width 6.1 mm
plastic very thin fine-pitch ball grid array package; 56 balls;
body 4.5
×
7
×
0.65 mm
Temperature
Range (°C)
–40 to +85
–40 to +85
–40 to +85
Version
SOT370-1
SOT362-1
SOT702-1
2004 Sep 16
2
Philips Semiconductors
Product data sheet
3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74LVT16374A
LOGIC SYMBOL (SSOP AND TSSOP PACKAGES)
47
46
44
43
41
40
38
37
PIN CONFIGURATION (SSOP AND TSSOP
PACKAGE OPTIONS)
1OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1CP
1D0
1D1
GND
1D2
1D3
V
CC
1D4
1D5
GND
1D6
1D7
2D0
2D1
GND
2D2
2D3
V
CC
2D4
2D5
GND
2D6
2D7
2CP
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
48
1
1CP
1OE
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
1Q0
!Q1
GND
1Q2
1Q3
2
36
3
35
5
33
6
32
8
30
9
29
11
27
12
26
V
CC
1Q4
1Q5
GND
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7
25
24
2CP
2OE
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
1Q6
1Q7
2Q0
2Q1
GND
13
14
16
17
19
20
22
23
2Q2
2Q3
SW00018
V
CC
2Q4
2Q5
GND
LOGIC SYMBOL (IEEE/IEC)
1OE
1CP
2OE
2CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
30
29
27
26
44
43
41
40
38
37
36
35
33
32
2D
2
∇
1
48
24
25
47
46
1EN
C1
2EN
C2
2Q6
2Q7
2OE
SW00017
1D
1
∇
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
SW00016
2004 Sep 16
3
Philips Semiconductors
Product data sheet
3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74LVT16374A
PIN DESCRIPTION (SSOP AND TSSOP PACKAGE
OPTIONS)
PIN NUMBER
47, 46, 44, 43, 41, 40,
38, 37 36, 35, 33, 32,
30, 29, 27, 26
2, 3, 5, 6, 8, 9, 11, 12
13, 14, 16, 17, 19, 20,
22, 23
1, 24
48, 25
4, 10, 15, 21, 28, 34,
39, 45
7, 18, 31, 42
SYMBOL
1D0 to 1D7
2D0 to 2D7
1Q0 to 1Q7
2Q0 to 2Q7
1OE, 2OE
1CP, 2CP
GND
V
CC
FUNCTION
EV PACKAGE TERMINAL PLACEMENT, TOP VIEW
1
A
2
3
4
5
6
Data inputs
B
C
Data outputs
D
Output enable inputs
(active-LOW)
Clock pulse inputs (active
rising edge)
Ground (0 V)
Positive supply voltage
E
F
G
H
J
K
SR0243
TERMINAL ASSIGNMENTS FOR 74LVT16374A IN VFBGA
1
A
B
C
D
E
F
G
H
J
K
1OE
1Q1
1Q3
1Q5
1Q7
2Q0
2Q2
2Q4
2Q6
2OE
2
NC
1Q0
1Q2
1Q4
1Q6
2Q1
2Q3
2Q5
2Q7
NC
GND
Vcc
GND
NC
GND
Vcc
GND
NC
3
NC
GND
Vcc
GND
4
NC
GND
Vcc
GND
5
NC
1D0
1D2
1D4
1D6
2D1
2D3
2D5
2D7
NC
6
1CP
1D1
1D3
1D5
1D7
2D0
2D2
2D4
2D6
2CP
FUNCTION TABLE
INPUTS
nOE
L
L
L
H
H
H =
h =
L =
l =
NC=
X =
Z =
↑
=
↑
=
nCP
↑
↑
↑
↑
↑
nDx
l
h
X
X
nDx
INTERNAL
REGISTER
L
H
NC
NC
nDx
OUTPUTS
OPERATING MODE
nQ0 to nQ7
L
H
NC
Z
Z
Load and read register
Hold
Disable outputs
HIGH voltage level
HIGH voltage level one set-up time prior to the HIGH-to-LOW E transition
LOW voltage level
LOW voltage level one set-up time prior to the HIGH-to-LOW E transition
No change
Don’t care
High-impedance “off” state
LOW-to-HIGH clock transition
Not a LOW-to-HIGH clock transition
2004 Sep 16
4
Philips Semiconductors
Product data sheet
3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74LVT16374A
LOGIC DIAGRAM
nD0
nD1
nD2
nD3
nD4
nD5
nD6
nD7
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
nCP
nOE
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
SW00019
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
O
OUT
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
V
O
< 0 V
Output in Off or HIGH state
Output in LOW state
Output in HIGH state
V
I
< 0 V
CONDITIONS
RATING
–0.5 to +4.6
–50
–0.5 to +7.0
–50
–0.5 to +7.0
128
–64
mA
UNIT
V
mA
V
mA
V
T
stg
Storage temperature range
–65 to +150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
O
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
HIGH-level input voltage
Input voltage
HIGH-level output current
LOW-level output current
LOW-level output current; current duty cycle
≤
50 %; f
≥
1 kHz
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
–40
PARAMETER
MIN
2.7
0
2.0
0.8
–32
32
64
10
+85
mA
ns/V
°C
MAX
3.6
5.5
UNIT
V
V
V
V
mA
2004 Sep 16
5
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