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HYB25DC256163CF-5: 产品描述DDR DRAM, 16MX16, 0.6ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60; 产品类别存储存储; 文件大小1MB，共33页; 制造商QIMONDA; 标准

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HYB25DC256163CF-5概述

DDR DRAM, 16MX16, 0.6ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60

HYB25DC256163CF-5规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	QIMONDA
零件包装代码	BGA
包装说明	TBGA, BGA60,9X12,40/32
针数	60
Reach Compliance Code	unknown
ECCN代码	EAR99
访问模式	FOUR BANK PAGE BURST
最长访问时间	0.6 ns
其他特性	AUTO/SELF REFRESH
最大时钟频率 (fCLK)	200 MHz
I/O 类型	COMMON
交错的突发长度	2,4,8
JESD-30 代码	R-PBGA-B60
长度	12 mm
内存密度	268435456 bit
内存集成电路类型	DDR DRAM
内存宽度	16
功能数量	1
端口数量	1
端子数量	60
字数	16777216 words
字数代码	16000000
工作模式	SYNCHRONOUS
最高工作温度	70 °C
最低工作温度
组织	16MX16
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	TBGA
封装等效代码	BGA60,9X12,40/32
封装形状	RECTANGULAR
封装形式	GRID ARRAY, THIN PROFILE
电源	2.6 V
认证状态	Not Qualified
刷新周期	8192
座面最大高度	1.2 mm
自我刷新	YES
连续突发长度	2,4,8
最大待机电流	0.004 A
最大压摆率	0.21 mA
最大供电电压 (Vsup)	2.7 V
最小供电电压 (Vsup)	2.5 V
标称供电电压 (Vsup)	2.6 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子形式	BALL
端子节距	1 mm
端子位置	BOTTOM
宽度	8 mm

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March 2008

HYB25DC256803C[E/F]

HYB25DC256163C[E/F]

2 5 6 - M b i t D o u b l e - D a t a - R a t e SG R A M

Green Product

Internet Data Sheet

Rev. 1.30

Internet Data Sheet

HYB25DC256[80/16]3C[E/F]

256-Mbit Double-Data-Rate SGRAM

1.2

Description

The 256-Mbit Double-Data-Rate SGRAM is a high-speed CMOS, dynamic random-access memory containing

268,435,456 bits. It is internally configured as a quad-bank DRAM.

The 256-Mbit Double-Data-Rate SGRAM uses a double-data-rate architecture to achieve high-speed operation. The double-

data-rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock

cycle at the I/O pins. A single read or write access for the 256-Mbit Double-Data-Rate SGRAM effectively consists of a single

2n-bit wide, one clock cycle data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle

data transfers at the I/O pins.

A bidirectional data strobe (DQS) is transmitted externally, along with data, for use in data capture at the receiver. DQS is a

strobe transmitted by the DDR SGRAM during Reads and by the memory controller during Writes. DQS is edge-aligned with

data for Reads and center-aligned with data for Writes.

The 256-Mbit Double-Data-Rate SGRAM operates from a differential clock (CK and CK; the crossing of CK going HIGH and

CK going LOW is referred to as the positive edge of CK). Commands (address and control signals) are registered at every

positive edge of CK. Input data is registered on both edges of DQS, and output data is referenced to both edges of DQS, as

well as to both edges of CK.Read and write accesses to the DDR SGRAM are burst oriented; accesses start at a selected

location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration

of an Active command, which is then followed by a Read or Write command. The address bits registered coincident with the

Active command are used to select the bank and row to be accessed. The address bits registered coincident with the Read or

Write command are used to select the bank and the starting column location for the burst access.

The DDR SGRAM provides for programmable Read or Write burst lengths of 2, 4 or 8 locations. An Auto Precharge function

may be enabled to provide a self-timed row precharge that is initiated at the end of the burst access. As with standard SDRAMs,

the pipelined, multibank architecture of DDR SGRAMs allows for concurrent operation, thereby providing high effective

bandwidth by hiding row precharge and activation time.

An auto refresh mode is provided along with a power-saving power-down mode. All inputs are compatible with the Industry

Standard for SSTL_2. All outputs are SSTL_2, Class II compatible.

Note: The functionality described and the timing specifications included in this data sheet are for the DLL Enabled mode of

operation.

Rev. 1.30, 2008-03

03292006-SR4U-HULB

HYB25DC256163CF-5相似产品对比

	HYB25DC256163CF-5	HYB25DC256803CE-5	HYB25DC256803CF-5	HYB25DC256803CF-6	HYB25DC256803CE-6	HYB25DC256803CF-4	HYB25DC256803CE-4	HYB25DC256163CF-4
描述	DDR DRAM, 16MX16, 0.6ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60	DDR DRAM, 32MX8, 0.6ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66	DDR DRAM, 32MX8, 0.6ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60	DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66	DDR DRAM, 32MX8, 0.5ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60	DDR DRAM, 32MX8, 0.5ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66	DDR DRAM, 16MX16, 0.5ns, CMOS, PBGA60, GREEN, PLASTIC, TFBGA-60
是否Rohs认证	符合	符合	符合	符合	符合	符合	符合	符合
零件包装代码	BGA	TSOP2	BGA	BGA	TSOP2	BGA	TSOP2	BGA
包装说明	TBGA, BGA60,9X12,40/32	TSSOP, TSSOP66,.46	TBGA, BGA60,9X12,40/32	TBGA, BGA60,9X12,40/32	TSSOP, TSSOP66,.46	TBGA, BGA60,9X12,40/32	TSSOP, TSSOP66,.46	TBGA, BGA60,9X12,40/32
针数	60	66	60	60	66	60	66	60
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
访问模式	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
最长访问时间	0.6 ns	0.6 ns	0.6 ns	0.7 ns	0.7 ns	0.5 ns	0.5 ns	0.5 ns
其他特性	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
最大时钟频率 (fCLK)	200 MHz	200 MHz	200 MHz	166 MHz	166 MHz	250 MHz	250 MHz	250 MHz
I/O 类型	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
交错的突发长度	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
JESD-30 代码	R-PBGA-B60	R-PDSO-G66	R-PBGA-B60	R-PBGA-B60	R-PDSO-G66	R-PBGA-B60	R-PDSO-G66	R-PBGA-B60
长度	12 mm	22.22 mm	12 mm	12 mm	22.22 mm	12 mm	22.22 mm	12 mm
内存密度	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit
内存集成电路类型	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
内存宽度	16	8	8	8	8	8	8	16
功能数量	1	1	1	1	1	1	1	1
端口数量	1	1	1	1	1	1	1	1
端子数量	60	66	60	60	66	60	66	60
字数	16777216 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	16777216 words
字数代码	16000000	32000000	32000000	32000000	32000000	32000000	32000000	16000000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
组织	16MX16	32MX8	32MX8	32MX8	32MX8	32MX8	32MX8	16MX16
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TBGA	TSSOP	TBGA	TBGA	TSSOP	TBGA	TSSOP	TBGA
封装等效代码	BGA60,9X12,40/32	TSSOP66,.46	BGA60,9X12,40/32	BGA60,9X12,40/32	TSSOP66,.46	BGA60,9X12,40/32	TSSOP66,.46	BGA60,9X12,40/32
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	GRID ARRAY, THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, THIN PROFILE
电源	2.6 V	2.6 V	2.6 V	2.5 V	2.5 V	2.6 V	2.6 V	2.6 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
刷新周期	8192	8192	8192	8192	8192	8192	8192	8192
座面最大高度	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
自我刷新	YES	YES	YES	YES	YES	YES	YES	YES
连续突发长度	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
最大待机电流	0.004 A	0.004 A	0.004 A	0.004 A	0.004 A	0.006 A	0.006 A	0.006 A
最大压摆率	0.21 mA	0.21 mA	0.21 mA	0.18 mA	0.18 mA	0.315 mA	0.315 mA	0.315 mA
最大供电电压 (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
最小供电电压 (Vsup)	2.5 V	2.5 V	2.5 V	2.3 V	2.3 V	2.5 V	2.5 V	2.5 V
标称供电电压 (Vsup)	2.6 V	2.6 V	2.6 V	2.5 V	2.5 V	2.6 V	2.6 V	2.6 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子形式	BALL	GULL WING	BALL	BALL	GULL WING	BALL	GULL WING	BALL
端子节距	1 mm	0.65 mm	1 mm	1 mm	0.65 mm	1 mm	0.65 mm	1 mm
端子位置	BOTTOM	DUAL	BOTTOM	BOTTOM	DUAL	BOTTOM	DUAL	BOTTOM
宽度	8 mm	10.16 mm	8 mm	8 mm	10.16 mm	8 mm	10.16 mm	8 mm
厂商名称	QIMONDA	QIMONDA	-	-	-	QIMONDA	QIMONDA	QIMONDA

HYB25DC256163CF-5

HYB25DC256163CF-5概述

HYB25DC256163CF-5规格参数

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