HY23C16202
Description
1MX16/2MX8 BIT
CMOS MASK ROM
The HY23C16202 high performance read only memory is organized either as 2,097,152 x 8 bit (byte mode) or
as 1,048,576 x 16 bit(word mode) followed by BHE mode select. The low power feature allows the battery
operation.
The large size of 16M bit memory density is ideal for character generator, data or program
memory in micro-processor application. The HY23C16202 is packaged 42pin DIP , 44 pin SOP or 44 pin
TSOP-II.
Key features
• Switchable Organization
Byte Mode : 2,097,152 X 8 bit
Word Mode : 1,048,576 X 16 bit
• Single 5V power supply operation
• Access Time : 100/120ns (Max)
• Standby Current : 50 (Max)
• Operating Current : 60 (Max)
• TTL compatible inputs and outputs
• 3-State outputs for wired-OR expansion
• Word or Byte switchable by BHE pin
• Fully static operation
• Package
HY23C16202D
: 42pin Plastic DIP(600 mil)
HY23C16202S
: 44pin Plastic SOP(500mil)
HY23C16202T
: 44pin Plastic TSOP-II(400mil)
HY23C16202M
: 48pin Plastic TSOP-I(12x20mm)
HY23C16202F
: 48pin Plastic TSOP-I(12x20mm)
Pin Description
Pin
A0~A19
Q0~Q14
Q15/A-1
BHE
CEB*
OEB*
VCC
VSS
NC
Function
Address inputs
Data Outputs
Output Q15(Word Mode)/
LSB Address(Byte Mode)
Byte High Enable input
(Word/Byte selection)
Chip Enable input
Output Enable input
Power supply
Ground
No Connection
Pin Configuration
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CEB
VSS
OEB
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BHE
VSS
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CEB
VSS
OEB
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
42DIP
13
14
15
16
17
18
19
20
21
22
32
31
30
29
28
27
26
25
24
23
VSS
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
HY23C16202T
HY23C16202D
Rev1 Page 1 of 8
HY23C16202S
¢
¢
¡
* User selectable polarity
44
43
42
41
40
39
38
37
36
35
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BHE
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CEB
VSS
OEB
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
1
2
3
4
5
6
7
8
9
10
11
12
44
43
42
41
40
39
38
37
36
35
34
44SOP
34
33
44TSOP-
33
32
31
30
29
28
27
26
25
24
23
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BHE
VSS
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
HY23C16202
Absolute Maximum Ratings
Symbol
T
A
T
STG
V
CC
V
OUT
V
IN
Parameter
Ambient Operating Temperature
Storage Temperature
Supply Voltage to Ground Potential
Output Voltage
Input Voltage
Rating
-10 ~ 80
1MX16/2MX8 BIT
CMOS MASK ROM
Unit
£
-0.5 ~ 7.0
-0.5 ~ Vcc+0.5
-0.5 ~ Vcc+0.5
Stress above those listed under “absolute maximum ratings” may cause permanent damage to the
device. These are stress ratings only. Functional operation of this device at these or any other
conditions above those indicated in the operational sections of this specification is not implied and
exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Recommended DC Operating Conditions(VCC=5.0
·
0.5V, T
A
= 0 ~70
×
)
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min
4.5
0
2.2
-0.3
Typ
5.0
0
Max
5.5
0
Vcc+0.3
0.8
¡
Unit
V
V
V
V
DC Electrical Characteristics(VCC=5.0
·
0.5V, T
A
=0~70
×
)
Symbol
V
OH
V
OL
I
IL
I
OL
I
CC
Parameter
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Operating Supply Current
(F=6.7MHz)
I
SB1
I
SB2
Standby Current(TTL)
Standby Current(CMOS)
Condition
IOH=-1mA
IOL=2.1mA
¤
¡
¢
Min
2.4
Typ
Max
0.4
10
10
¤
VIN=0V to VCC
VOUT=0V to VCC
CEB=OEB=VIL
All Output Open
CEB=VIH, all Output Open
CEB=VCC, all Output Open
60
1.0
50
Rev1 Page 3 of 8
£
-65 ~ 150
V
V
V
Unit
V
V
uA
uA
mA
mA
uA
HY23C16202
Capacitance(T
A
=25
×
, f=1.0MHz)
Symbol
C
I
C
O
Parameter
Input Capacitance
Output Capacitance
1MX16/2MX8 BIT
CMOS MASK ROM
Condition
V
IN
= 0V
V
OUT
= 0V
Min
Max
10
10
Unit
pF
pF
Capacitance is periodically sampled and not 100% tested
Function Table
MODE
Standby
16bit
Operating
L/H
8bit
Operating
L/H
L
Data output
(upper 8bit)
H/L
X
High-Z
CEB/CE
H/L
OEB/OE
X
BHE
X
H
Data output
(lower 8bit)
High-Z
H
Q0 ~ Q7
Q8 ~ Q14
High-Z
Data Out
L
Active
Q15 ~A-1
POWER
Standby
Output
Disable
X
AC Characteristics(VCC=5.0
·
0.5V, T
A
=0~70
×
)
Symbol
tRC
tACE
tAA
tAOE
tOH
tHZ
tLZ
Parameter
Min
Read cycle time
Chip enable access time
Address access time
Output enable access time
Output hold time from address change
Output or chip disable to output High-Z
Output or chip Enable to output Low-Z
10
0
20
10
100
100
100
50
0
20
¡
100ns
Max
Min
120
120ns
Unit
Max
ns
120
120
60
ns
ns
ns
ns
ns
ns
AC Test Condition
• Input pulse level
• Input rise and fall time
• Input and output timing level
• Output load
0.4V to 2.4V
10ns
0.8V to 2.0V
1 TTL gate and CL=100pF
Rev1 Page 4 of 8
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