A705
www.addmtek.com
DESCRIPTION
The A705 is a low dropout current regulator rated
for 190mA, 210mA, 230mA, 250mA, 270mA, 290mA,
310mA, 330mA, and 350mA constant sink current. The
low quiescent current and low dropout voltage are
achieved by advanced Bi-CMOS process.
APPLICATIONS
H
IGH
P
OWER
A
DVANCED
C
URRENT
R
EGULATOR
FEATURES
190/210/230/250/270/290/310/330/350mA
±
10mA
constant sink current.
Output short / open circuit protection.
Low dropout voltage.
Low quiescent current.
Supply voltage range 2.7V ~ 12V.
2KV HBM ESD protection.
Advanced Bi-CMOS process.
SOT-89 and TO-252 package available.
Compatible with AMC7135.
Power LED Driver
LED Miner’s Lamp
TYPICAL APPLICATION CIRCUIT
V
IN
PACKAGE PIN OUT
V
DD
V
DD
VDD
GND
OUT
GND
OUT
TO-252
C
IN
1uF
A705
GND
OUT
C
O
1uF
SOT-89
(Top View)
GND
ORDER INFORMATION
(Note 1)
Output Current
(Note 2)
180mA ~ 200mA
200mA ~ 220mA
220mA ~ 240mA
240mA ~ 260mA
260mA ~ 280mA
280mA ~ 300mA
300mA ~ 320mA
320mA ~ 340mA
340mA ~ 360mA
N
SOT-89
3-pin
A705NGT-190
A705NGT-210
A705NGT-230
A705NGT-250
A705NGT-270
A705NGT-290
A705NGT-310
A705NGT-330
A705NGT-350
S
TO-252
3-pin
-
A705SGT-210
A705SGT-230
A705SGT-250
A705SGT-270
A705SGT-290
A705SGT-310
A705SGT-330
A705SGT-350
Note 1: The letter “G” is marked for Green process, and letter “T” is marked for Tape & Reel.
2: For other output current ranking, please consult sales or FAEs.
Copyright
©
2009 ADDtek Corp.
1
DD077_D -- JULY 2009
A705
ABSOLUTE MAXIMUM RATINGS
(Note)
Input Voltage, V
DD
Output Voltage, V
OUT
Maximum Junction Temperature, T
J
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground.
Currents are positive into, negative out of the specified terminal.
-0.3V to 13.2V
-0.3V to 17V
150°C
-40°C to 150°C
260°C
BLOCK DIAGRAM
A705
VDD
Band-gap
Reference
Control
Circuit
OUT
GND
PIN DESCRIPTION
Pin Name
V
DD
OUT
GND
Pin Function
Power supply.
Output pins. Connected to load.
Ground.
THERMAL RESISTANCE
Package
N
S
SOT-89
TO-252
θ
JT
(°C /W)
35
7
Note:
T
J
= T
C
+ (P
D
× θ
JT
)
θ
JT
: Thermal Resistance - Junction to Tab.
T
C
: Case (Tab) Temperature.
T
J
: Junction Temperature.
P
D
: Power Consumption.
Copyright
©
2009 ADDtek Corp.
2
DD077_D -- JULY 2009
A705
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Output Sink Current
Junction Temperature
Operating Free-air Temperature Range
Symbol
V
DD
I
OUT
T
J
T
A
-40
Min
2.7
Typ
Max
12
360
125
+85
Unit
V
mA
°C
°C
DC ELECTRICAL CHARACTERISTICS
V
DD
=3.7V, T
A
=25°C, No Load (Unless otherwise noted)
Parameter
Symbol
Condition
A705N
A705P
A705Q
A705R
Output Sink Current
I
OUT
V
OUT
=0.2V
A705S
A705T
A705V
A705W
A705X
Load Regulation
Line Regulation
Output Dropout Voltage
(Note)
Supply Current Consumption
V
OUTL
I
DD
V
OUT
=0.2V to 3V
V
DD
= 3V to 12V, V
OUT
=0.2V
120
200
Min
180
200
220
240
260
280
300
320
340
Typ
190
210
230
250
270
290
310
330
350
Max
200
220
240
260
280
300
320
340
360
2
2
mA/V
mA/V
mV
uA
VDD
mA
OUT
Unit
Apply
Pin
Note: Output dropout voltage: 90% x I
OUT
@ V
OUT
=200mV
Copyright
©
2009 ADDtek Corp.
3
DD077_D -- JULY 2009
A705
APPLICATION INFORMATION
Output Capacitor C
O
and PCB layout:
The output capacitor C
O
may be removed under certain condition. Please refer to the following figure. If LED and
A705 is located in the same PCB, and the length of the routing path L1<10cm & L2<3cm, the output capacitor C
O
can
be neglected. The number of LEDs in series could be 1 ~ 3, that the total V
F
of the LED string is smaller 11V.
Length = L1
V
IN
VDD
C
IN
1uF
＋
V
F, Total
－
A705
OUT
GND
Length = L2
GND
PCB
If LED and A705 is located in separate PCBs, or the length of the routing path L1>10cm or L2>3cm, the output
capacitor C
O
should be added. Typically, capacitance of 0.1uF ~ 1uF is recommended and 1uF is needed when L2 is
much longer than 3cm.
Length = L1
Length = L1
V
IN
VDD
C
IN
1uF
V
IN
VDD
OUT
C
O
0.1uF
|
1uF
A705
GND
C
IN
Length
= L2
1uF
A705
GND
OUT
Length
= L2
C
O
0.1uF
|
1uF
GND
PCB
GND
PCB
PCB
If four LEDs or more are connected in series to OUT pin, the supply voltage to VDD pin and LED+ end should
be separated because the voltage level of V
LED+
is higher than the voltage rating of VDD pin. The recommended
application circuit is shown in the following figure.
V
IN
C
BP
1uF
VDD
C
IN
1uF
A705
OUT
GND
C
O
0.1uF
|
1uF
GND
Copyright
©
2009 ADDtek Corp.
4
DD077_D -- JULY 2009
A705
The Maximum Power Dissipation on Regulator:
P
D(MAX)
= V
OUT(MAX)
×
I
OUT(NOM)
+ V
IN(MAX)
×
I
Q
V
OUT(MAX)
= the maximum voltage on output pin;
I
OUT(NOM)
= the nominal output current;
I
Q
= the quiescent current the regulator consumes at I
OUT(MAX)
;
V
IN(MAX)
= the maximum input voltage.
Thermal Consideration:
The maximum junction temperature ratings of A705 should not be exceeded under continuous normal load
conditions. When power consumption is over about 700mW (SOT-89 package, at T
A
=70°C) or 1000mW (TO-252
package, at T
A
=70°C), additional heat sink is required to control the junction temperature below 120°C.
The junction temperature is:
T
J
= P
D
(θ
JT
+θ
CS
+θ
SA
) + T
A
P
D
: Dissipated power.
θ
JT
:
Thermal resistance from the junction to the mounting tab of the package.
For SOT-89 package,
θ
JT
= 35.0 °C /W. For TO-252 package,
θ
JT
= 7.0 °C /W.
θ
CS
:
Thermal resistance through the interface between the IC and the surface on which it is mounted.
(typically,
θ
CS
< 1.0°C /W)
θ
SA
:
Thermal resistance from the mounting surface to ambient (thermal resistance of the heat sink).
If PC Board copper is going to be used as a heat sink, below table can be used to determine the appropriate size
of copper foil required. For multi-layered PCB, these layers can also be used as a heat sink. They can be connected with
several through-hole vias.
PCB
θ
SA
(°C /W)
PCB heat sink size (mm
2
)
59
500
45
1000
38
1500
33
2000
27
3000
24
4000
21
5000
Recommended figure of PCB area used as a heat sink.
Heat-pad of TO-252
VDD
GND
OUT
Through-hole vias
Copyright
©
2009 ADDtek Corp.
5
DD077_D -- JULY 2009
嵌入式系统
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