DATASHEET
ISL78206
40V 2.5A Buck Controller with Integrated High-side MOSFET
The ISL78206 is an AEC-Q100 qualified 40V, 2.5A synchronous
buck controller with a high-side MOSFET and low-side driver
integrated. The ISL78206 supports a wide input voltage range
from 3V to 40V, output current up to 2.5A, and can be
operated in synchronous and non-synchronous buck
topologies. The ISL78206 provides a low system cost, high
efficiency, single part buck solution for automotive
applications for a wide variety of input voltages. For vehicle
systems that must be kept powered during cold-cranking or
start-stop operation, the ISL78206 can be replaced by its
pin-to-pin alternative, the ISL78201 which offers boost-buck
operation. Together, these devices offer two functional
alternatives on the same PCB layout, providing convenience,
flexibility, and facilitating extensive design reuse.
The ISL78206 offers the most robust current protections. It
uses peak current mode control with cycle-by-cycle current
limiting. It is implemented with frequency foldback
undercurrent limit conditions. In addition, the hiccup
overcurrent mode is also implemented to guarantee reliable
operations under harsh short conditions.
The ISL78206 has comprehensive protections against various
faults, including overvoltage, undervoltage, programmable
overcurrent and over-temperature. Built-in soft-start allows the
IC to start-up smoothly and is reactivated during hiccup mode
fault recovery.
FN8618
Rev 2.00
March 25, 2015
Features
• Ultra wide input voltage range 3V to 40V (refer to
“Input
Voltage” on page 12
for more details)
• Less than 5µA (max) shutdown input current (IC disabled)
• Temperature range -40°C to +105°C
• Integrated high-side MOSFET
• Operational topologies
- Synchronous buck
- Non-synchronous buck
• Programmable frequency from 200kHz to 2.2MHz and
frequency synchronization capability
•
±
1% tight voltage regulation accuracy
• Reliable cycle-by-cycle overcurrent protection
- Temperature compensated current sense
- Frequency foldback
- Programmable OC limit
- Hiccup mode protection in worst case short condition
• 20 Ld HTSSOP package, pin-to-pin compatible with
ISL78201 boost buck
• AEC-Q100 qualified
• Pb-free (RoHS compliant)
Applications
• Automotive applications
• General purpose power regulator
• 24V bus power
• Battery power
• Embedded processor and I/O supplies
PGOOD
EN
SYNC
FS
VCC
ILIMIT
SS
ISL78206
VIN
VIN
EFFICIENCY (%)
BOOT
PHASE
LGATE
PGND
V OUT
DGND
SGND
FB
COMP
100
95 6V
90
85
80
75
70
65
60
55
50
45
40
35
30
0.0
12V
24V
40V
0.5
1.0
1.5
2.0
2.5
LOAD CURRENT (A)
FIGURE 1. TYPICAL APPLICATION SCHEMATIC I - SYNCHRONOUS
BUCK
FIGURE 2. EFFICIENCY, SYNCHRONOUS BUCK, 500kHz, V
OUT
5V,
T
A
= +25°C
FN8618 Rev 2.00
March 25, 2015
Page 1 of 19
ISL78206
Pin Configuration
ISL78206
(20 LD HTSSOP)
TOP VIEW
PGND 1
BOOT 2
VIN 3
VIN 4
SGND 5
VCC 6
NC 7
EN 8
FS 9
SS 10
21
PAD
20 LGATE
19 SYNC
18 NC
17 PHASE
16 PHASE
15 PGOOD
14 DGND
13 ILIMIT
12 COMP
11 FB
Functional Pin Description
PIN NAME
PGND
BOOT
PIN #
1
2
DESCRIPTION
This pin is used as the ground connection of the power flow, including the driver.
This pin provides bias voltage to the high-side MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive
the internal N-channel MOSFET. The boot charge circuitries are integrated inside of the IC. No external boot diode is needed.
A 1µF ceramic capacitor is recommended to be used between the BOOT and PHASE pin.
Connect the input rail to these pins that are connected to the drain of the integrated high-side MOSFET, as well as the source
for the internal linear regulator that provides the bias of the IC.
With the part switching, the operating input voltage applied to the VIN pins must be under 40V. This recommendation allows
for short voltage ringing spikes (within a couple of ns time range) due to switching while not exceeding Absolute Maximum
Ratings.
This pin provides the return path for the control and monitor portions of the IC.
This pin is the output of the internal linear regulator that supplies the bias for the IC, including the driver. A minimum 4.7µF
decoupling ceramic capacitor is recommended between VCC to ground.
The controller is enabled when this pin is pulled HIGH or left floating. The IC is disabled when this pin is pulled LOW. Range:
0V to 5.5V.
Tying this pin to VCC, or GND, or leaving it open will force the IC to have 500kHz switching frequency. The oscillator switching
frequency can also be programmed by adjusting the resistor from this pin to GND.
Connect a capacitor from this pin to ground. This capacitor, along with an internal 5µA current source, sets the soft-start
interval of the converter. Also, this pin can be used to track a ramp on this pin.
This pin is the inverting input of the voltage feedback error amplifier. With a properly selected resistor divider connected from
V
OUT
to FB, the output voltage can be set to any voltage between the input rail (reduced by maximum duty cycle and voltage
drop) and the 0.8V reference. Loop compensation is achieved by connecting an RC network across COMP and FB. The FB pin
is also monitored for overvoltage events.
Output of the voltage feedback error amplifier.
Programmable current limit pin. With this pin connected to VCC pin, or to GND, or left open, the current limit threshold is set
to a default of 3.6A; the current limit threshold can be programmed with a resistor from this pin to GND.
Digital ground pin. Connect to SGND at quiet ground copper plane.
PGOOD is an open drain output and pull up this pin with a resistor to VCC for proper function. PGOOD will be pulled low
under the events when the output is out of regulation (OV or UV) or EN pin is pulled low. PGOOD rising has a fixed 128
cycles delay.
These pins are the PHASE nodes that should be connected to the output inductor. These pins are connected to the source of
the high side N-channel MOSFET.
This pin can be used to synchronize two or more ISL78206 controllers. Multiple ISL78206s can be synchronized with their
SYNC pins connected together. 180 degree phase shift is automatically generated between the master and slave ICs.
The internal oscillator can also lock to an external frequency source applied to this pin with square pulse waveform (with
frequency 10% higher than the IC’s local frequency, and pulse width higher than 150ns).
This pin should be left floating if not used.
VIN
3, 4
SGND
VCC
EN
FS
SS
FB
5
6
8
9
10
11
COMP
ILIMIT
DGND
PGOOD
12
13
14
15
PHASE
SYNC
16, 17
19
FN8618 Rev 2.00
March 25, 2015
Page 2 of 19
ISL78206
Functional Pin Description
(Continued)
PIN NAME
LGATE
PIN #
20
DESCRIPTION
In synchronous buck mode, this pin is used to drive the lower side MOSFET to improve efficiency. A 5.1k or smaller value
resistor has to be added to connect LGATE to ground to avoid falsely turn-on of LGATE caused by coupling noise.
In non-synchronous buck when a diode is used as the bottom side power device, this pin should be connected to VCC through
a resistor (less than 5k) before VCC start-up to disable the low side driver (LGATE).
No connection pin. Connect these pins to SGND at quiet ground copper plane.
Bottom thermal pad. It is not connected to any electrical potential of the IC. In layout, it must be connected to PCB ground
copper plane with area as large as possible to effectively reduce the thermal impedance.
NC
PAD
7, 18
21
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL78206AVEZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL78206.
For more information on MSL please see techbrief
TB363.
PART
MARKING
78206 AVEZ
TEMP. RANGE
(°C)
-40 to +105
PACKAGE
(Pb-Free)
20 Ld HTSSOP
PKG.
DWG. #
M20.173A
FN8618 Rev 2.00
March 25, 2015
Page 3 of 19
Block Diagram
VCC
PGOOD
VIN (x2)
VIN
FN8618 Rev 2.00
March 25, 2015
Page 4 of 19
ISL78206
CURRENT
MONITOR
BIAS LDO
ILIMIT
SGND
POWER-ON
RESET
VCC
BOOT
EN
CONTROL LOGIC
OCP, OVP, OTP
PHASE (x2)
GATE DRIVE
SYNC
VOLTAGE
MONITOR
OSCILLATOR
SLOPE
COMPENSATION
FS
LGATE
+
SOFT-START
LOGIC
+
BOOT REFRESH
VCC
5 µA
0.8V
REFERENCE
EA
COMPARATOR
SS
FB
COMP
PGND
FIGURE 3. BLOCK DIAGRAM
ISL78206
Typical Application Schematic I - Synchronous Buck
PGOOD
EN
SYNC
FS
VCC
ILIMIT
SS
ISL78206
VIN
VIN
BOOT
PHASE
LGATE
PGND
V OUT
DGND
SGND
FB
COMP
FIGURE 4. TYPICAL APPLICATION SCHEMATIC I - SYNCHRONOUS BUCK
Typical Application Schematic II - Non-Synchronous Buck
PGOOD
EN
SYNC
FS
VCC
ILIMIT
SS
ISL78206
VIN
VIN
BOOT
PHASE
LGATE
PGND
FB
COMP
V OUT
DGND
SGND
FIGURE 5. TYPICAL APPLICATION SCHEMATIC II - NON-SYNCHRONOUS BUCK
FN8618 Rev 2.00
March 25, 2015
Page 5 of 19
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