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74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 4 — 27 January 2016
Product data sheet
1. General description
The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2)
to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs
(E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is
HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32
lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight
output demultiplexer by using one of the active LOW enable inputs as the data input and
the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use
of current limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active HIGH mutually exclusive outputs
Multiple package options
Complies with JEDEC standard no. 7A
Input levels:
For 74HC238: CMOS level
For 74HCT238: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC238D
74HCT238D
74HC238DB
74HCT238DB
40 C
to +125
C
SSOP16
40 C
to +125
C
Name
SO16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
Version
SOT109-1
SOT338-1
Type number
NXP Semiconductors
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Table 1.
Ordering information
…continued
Package
Temperature range
Name
TSSOP16
Description
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT403-1
SOT763-1
40 C
to +125
C
40 C
to +125
C
Type number
74HC238PW
74HCT238PW
74HC238BQ
74HCT238BQ
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 16 terminals;
body 2.5
3.5
0.85 mm
4. Functional diagram
Fig 1.
Logic symbol
Fig 2.
Functional diagram
74HC_HCT238
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 27 January 2016
2 of 19
NXP Semiconductors
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Fig 3.
Logic diagram
74HC_HCT238
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 27 January 2016
3 of 19
NXP Semiconductors
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
Pin configuration SO16 and (T)SSOP16
Fig 5.
Pin configuration DHVQFN16
5.2 Pin description
Table 2.
Symbol
A0, A1, A2
E1
E2
E3
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7
GND
V
CC
Pin description
Pin
1, 2, 3
4
5
6
15, 14, 13, 12, 11, 10, 9, 7
8
16
Description
address input
enable input (active LOW)
enable input (active LOW)
enable input (active HIGH)
output (active HIGH)
ground (0 V)
supply voltage
74HC_HCT238
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 27 January 2016
4 of 19
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