74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
Rev. 02 — 27 October 2004
Product data sheet
1. General description
The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL-families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
off
. The I
off
circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC3G14 provides three inverting buffers with Schmitt-trigger action. It is capable
of transforming slowly changing input signals into sharply defined, jitter-free output
signals.
2. Features
s
s
s
s
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
±24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C.
s
s
s
s
s
s
3. Applications
s
Wave and pulse shaper for highly noisy environment
s
Astable multivibrator
s
Monostable multivibrator.
Philips Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
4. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C.
Symbol
Parameter
Conditions
Min
-
-
-
-
-
-
V
CC
= 3.3 V
[1] [2]
Typ
4.2
3.0
3.8
3.2
2.4
3.5
18.1
Max
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
pF
pF
t
PHL
, t
PLH
propagation delay input V
CC
= 1.8 V;
nA to output nY
C
L
= 30 pF; R
L
= 1 kΩ
V
CC
= 2.5 V;
C
L
= 30 pF; R
L
= 500
Ω
V
CC
= 2.7 V;
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V;
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 5.0 V;
C
L
= 50 pF; R
L
= 500
Ω
C
I
C
PD
[1]
input capacitance
power dissipation
capacitance per buffer
-
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of outputs.
[2]
The condition is V
I
= GND to V
CC
.
5. Ordering information
Table 2:
Ordering information
Package
Temperature range
74LVC3G14DP
74LVC3G14DC
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
TSSOP8
VSSOP8
XSON8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 0.95
×
1.95
×
0.5 mm
Version
SOT505-2
SOT765-1
SOT833-1
Type number
74LVC3G14GM
−40 °C
to +125
°C
6. Marking
Table 3:
Marking codes
Marking code
V14
V14
V14
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Type number
74LVC3G14DP
74LVC3G14DC
74LVC3G14GM
9397 750 13792
Product data sheet
Rev. 02 — 27 October 2004
2 of 17
Philips Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
7. Functional diagram
1
1
1A
1Y
7
7
2
3Y
3A
6
6
2
3
2A
2Y
5
3
5
mna740
mna741
Fig 1. Logic symbol
Fig 2. IEC logic symbol
A
Y
mna025
Fig 3. Logic diagram (one Schmitt trigger)
8. Pinning information
8.1 Pinning
3G14
1A
1
8
V
CC
1A
3Y
2A
GND
1
2
3
4
mna739
8
V
CC
1Y
3A
2Y
3Y
2
7
1Y
3G14
7
6
5
2A
3
6
3A
GND
4
5
2Y
001aab834
Transparent top view
Fig 4. Pin configuration TSSOP8 and
VSSOP8
Fig 5. Pin configuration XSON8
9397 750 13792
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 27 October 2004
3 of 17
Philips Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
8.2 Pin description
Table 4:
Symbol
1A
3Y
2A
GND
2Y
3A
1Y
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
Description
data input
data output
data input
ground (0 V)
data output
data input
data output
supply voltage
9. Functional description
9.1 Function table
Table 5:
Input nA
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
[1]
Output nY
H
L
10. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input diode current
input voltage
output diode current
output voltage
Conditions
V
I
< 0 V
[1]
Min
−0.5
-
−0.5
-
[1] [2]
[1] [2]
Max
+6.5
−50
+6.5
±50
V
CC
+ 0.5
+6.5
±50
±100
+150
300
Unit
V
mA
V
mA
V
V
mA
mA
°C
mW
V
O
> V
CC
or V
O
< 0 V
enable mode
Power-down mode
−0.5
−0.5
-
-
−65
output source or sink V
O
= 0 V to V
CC
current
V
CC
or GND current
storage temperature
power dissipation
T
amb
=
−40 °C
to +125
°C
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal condition.
9397 750 13792
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 27 October 2004
4 of 17
Philips Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
11. Recommended operating conditions
Table 7:
Symbol
V
CC
V
I
V
O
T
amb
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
Conditions
Min
1.65
0
0
−40
Typ
-
-
-
-
Max
5.5
5.5
V
CC
+125
Unit
V
V
V
°C
12. Static characteristics
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
=
−40 °C
to +85
°C
[1]
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
V
OH
HIGH-level output
voltage
V
I
= V
IH
or V
IL
I
O
=
−100 µA;
V
CC
= 1.65 V to 5.5 V
I
O
=
−4
mA; V
CC
= 1.65 V
I
O
=
−8
mA; V
CC
= 2.3 V
I
O
=
−12
mA; V
CC
= 2.7 V
I
O
=
−24
mA; V
CC
= 3.0 V
I
O
=
−32
mA; V
CC
= 4.5 V
I
LI
I
off
I
CC
∆I
CC
C
I
input leakage current
power-off leakage
current
additional quiescent
supply per pin
input capacitance
V
I
= 5.5 V or GND; V
CC
= 5.5 V
V
I
or V
O
= 5.5 V; V
CC
= 0 V
V
CC
−
0.1 -
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
-
-
-
-
±0.1
±0.1
0.1
5
3.5
-
-
-
-
-
-
±5
±10
10
500
-
V
V
V
V
V
V
µA
µA
µA
µA
pF
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.45
0.3
0.4
0.55
0.55
V
V
V
V
V
V
Conditions
Min
Typ
Max
Unit
quiescent supply current V
I
= V
CC
or GND; I
O
= 0 A; V
CC
= 5.5 V
V
I
= V
CC
−
0.6 V; I
O
= 0 A;
V
CC
= 2.3 V to 5.5 V
9397 750 13792
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 02 — 27 October 2004
5 of 17
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
