74HC393; 74HCT393
Dual 4-bit binary ripple counter
Rev. 03 — 6 September 2005
Product data sheet
1. General description
The 74HC393; HCT393 is a high-speed Si-gate CMOS device and is pin compatible with
Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
no. 7A.
The 74HC393; 74HCT393 contains 4-bit binary ripple counters with separate clocks
(1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter.
The operation of each half of the 74HC393; 74HCT393 is the same as the 74HC93;
74HCT93, except no external clock connections are required.
The counters are triggered by a HIGH-to-LOW transition of the clock inputs.
The counter outputs are internally connected to provide clock inputs to succeeding
stages. The outputs of the ripple counter do not change synchronously and should not be
used for high-speed address decoding.
The master resets (1MR and 2MR) are active-HIGH asynchronous inputs to each 4-bit
counter. A HIGH level on the nMR input overrides the clock and sets the outputs LOW.
2. Features
s
Two 4-bit binary counters with individual clocks
s
Divide by any binary module up to 28 in one package
s
Two master resets to clear each 4-bit counter individually
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
74HC393
t
PHL
, t
PLH
propagation delay
nCP to nQ0
nQx to nQ(x+1)
nMR to nQx
f
clk(max)
C
i
C
PD
maximum clock
frequency
input capacitance
power dissipation
capacitance (per gate)
[1] [2]
Parameter
Conditions
C
L
= 15 pF; V
CC
= 5 V
Min
Typ
Max
Unit
-
-
-
C
L
= 15 pF; V
CC
= 5 V
-
-
-
12
5
11
99
3.5
23
-
-
-
-
-
-
ns
ns
ns
MHz
pF
pF
Philips Semiconductors
74HC393; 74HCT393
Dual 4-bit binary ripple counter
Table 1:
Quick reference data
…continued
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
74HCT393
t
PHL
, t
PLH
propagation delay
nCP to nQ0
nQx to nQ(x+1)
nMR to nQx
f
clk(max)
C
i
C
PD
maximum clock
frequency
input capacitance
power dissipation
capacitance (per gate)
[1] [3]
Parameter
Conditions
C
L
= 15 pF; V
CC
= 5 V
Min
Typ
Max
Unit
-
-
-
C
L
= 15 pF; V
CC
= 5 V
-
-
-
20
6
15
53
3.5
25
-
-
-
-
-
-
ns
ns
ns
MHz
pF
pF
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
[2]
[3]
V
I
= GND to V
CC
V
I
= GND to V
CC
−
1.5 V
4. Ordering information
Table 2:
Ordering information
Temperature range Name
74HC393N
74HC393D
74HC393DB
74HC393PW
74HC393BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
DIP14
SO14
SSOP14
TSSOP14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic shrink small outline package; 14 leads; body width
5.3 mm
plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
Version
SOT27-1
SOT337-1
SOT402-1
SOT762-1
Type number Package
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals;
body 2.5
×
3
×
0.85 mm
DIP14
SO14
SSOP14
TSSOP14
plastic dual in-line package; 14 leads (300 mil)
plastic shrink small outline package; 14 leads; body width
5.3 mm
plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
74HCT393N
74HCT393D
−40 °C
to +125
°C
−40 °C
to +125
°C
SOT27-1
SOT337-1
SOT402-1
SOT762-1
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HCT393DB
−40 °C
to +125
°C
74HCT393PW
−40 °C
to +125
°C
74HCT393BQ
−40 °C
to +125
°C
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals;
body 2.5
×
3
×
0.85 mm
74HC_HCT393_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 6 September 2005
2 of 25
Philips Semiconductors
74HC393; 74HCT393
Dual 4-bit binary ripple counter
5. Functional diagram
1Q0
1
1CP
1Q1
1
1Q2
2
1MR
1Q3
3
4
5
6
2
CTR4
CT = 0
CT
1
+
0
3
4
5
3
6
2Q0
13
2CP
2Q1
2
2Q2
12
2MR
2Q3
11
10
9
8
12
CTR4
CT = 0
CT
13
+
0
11
10
9
3
8
001aad532
001aad533
Fig 1. Logic symbol
Fig 2. IEC logic symbol
1Q0
1
1CP
4-BIT
BINARY
RIPPLE
COUNTER
1Q1
1Q2
1Q3
3
4
5
6
2
1MR
2Q0
13
2CP
4-BIT
BINARY
RIPPLE
COUNTER
2Q1
2Q2
2Q3
11
10
9
8
12
2MR
001aad534
Fig 3. Functional diagram
0
1
2
3
4
15
5
14
6
13
7
12
11
10
9
8
001aad535
Fig 4. State diagram
74HC_HCT393_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 6 September 2005
3 of 25
Philips Semiconductors
74HC393; 74HCT393
Dual 4-bit binary ripple counter
Q
CP
T
FF
1
T
FF
2
Q
T
FF
3
Q
T
FF
4
Q
RD
MR
RD
RD
RD
Q0
Q1
Q2
Q3
001aad536
Fig 5. Logic diagram (one counter)
6. Pinning information
6.1 Pinning
1CP
2
3
4
5
6
7
GND
2Q3
8
1
14 V
CC
13 2CP
12 2MR
11 2Q0
10 2Q1
9
2Q2
1CP
1MR
1Q0
1Q1
1Q2
1Q3
GND
1
2
3
4
5
6
7
001aad531
14 V
CC
13 2CP
12 2MR
terminal 1
index area
1MR
1Q0
1Q1
1Q2
1Q3
393
11 2Q0
10 2Q1
9
8
2Q2
2Q3
393
001aad597
Transparent top view
Fig 6. Pin configuration SO14; DIP14
(T)SSOP14
Fig 7. Pin configuration DHVQFN14
6.2 Pin description
Table 3:
Symbol
1CP
1MR
1Q0
1Q1
1Q2
1Q3
GND
2Q3
74HC_HCT393_3
Pin description
Pin
1
2
3
4
5
6
7
8
Description
1 clock input (HIGH-to-LOW, edge-triggered)
1 asynchronous master reset input (active HIGH)
1 flip-flop output 0
1 flip-flop output 1
1 flip-flop output 2
1 flip-flop output 3
ground (0 V)
2 flip-flop output 3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 6 September 2005
4 of 25
Philips Semiconductors
74HC393; 74HCT393
Dual 4-bit binary ripple counter
Pin description
…continued
Pin
9
10
11
12
13
14
Description
2 flip-flop output 2
2 flip-flop output 1
2 flip-flop output 0
2 asynchronous master reset input (active HIGH)
2 clock input (HIGH-to-LOW, edge-triggered)
supply voltage
Table 3:
Symbol
2Q2
2Q1
2Q0
2MR
2CP
V
CC
7. Functional description
7.1 Function table
Table 4:
Count
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
[1]
Count sequence for one counter
Output
Q0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Q1
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
[1]
Q2
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
Q3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H = HIGH voltage level;
L = LOW voltage level.
74HC_HCT393_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 6 September 2005
5 of 25
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