74LV132-Q100
Rev. 2 — 20 May 2020
Quad 2-input NAND Schmitt trigger
Product data sheet
1. General description
The 74LV132-Q100 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC132-Q100 and 74HCT132-Q100.
The 74LV132-Q100 contains four 2-input NAND gates which accept standard input signals. These
gates are capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
The gate switches at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T-
is defined as the input hysteresis
voltage V
H
.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25 °C
Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and T
amb
= 25 °C
ESD protection:
•
MIL-STD-883, method 3015 exceeds 2000 V
•
HBM JESD22-A114F exceeds 2000 V
•
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
•
•
3. Applications
•
•
•
Wave and pulse shapers for highly noisy environments
Astable multivibrators
Monostable multivibrators
Nexperia
74LV132-Q100
Quad 2-input NAND Schmitt trigger
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LV132D-Q100
74LV132PW-Q100
74LV132BQ-Q100
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
Name
SO14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
Version
SOT108-1
plastic thin shrink small outline package; 14 leads; SOT402-1
body width 4.4 mm
SOT762-1
DHVQFN14 plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm
5. Functional diagram
1
1A
1Y
2
1B
3
4
2A
2Y
6
1
2
4
5
2B
&
3
9
3A
3Y
8
5
9
10
&
6
10
3B
&
8
A
12
4A
4Y
11
12
13
&
11
B
mna408
13
4B
Y
mna409
mna407
Fig. 1.
Logic symbol
Fig. 2.
IEC logic symbol
Fig. 3.
Logic diagram (one gate)
74LV132_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 2 — 20 May 2020
2 / 14
Nexperia
74LV132-Q100
Quad 2-input NAND Schmitt trigger
6. Pinning information
6.1. Pinning
74LV132-Q100
terminal 1
index area
14 V
CC
1A
2
3
4
5
6
7
GND
3Y
8
V
CC(1)
1
74LV132-Q100
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
aaa-009407
1B
14 V
CC
13 4B
12 4A
11 4Y
10 3B
9
8
3A
3Y
13 4B
12 4A
11 4Y
10 3B
9
3A
1Y
2A
2B
2Y
aaa-009408
Transparent top view
Fig. 4.
Pin configuration SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
(1) This is not a supply pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to V
CC
Fig. 5.
Pin configuration SOT762-1 (DHVQFN14)
6.2. Pin description
Table 2. Pin description
Symbol
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
GND
V
CC
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level.
Input
nA
L
L
H
H
nB
L
H
L
H
Output
nY
H
H
H
L
74LV132_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 2 — 20 May 2020
3 / 14
Nexperia
74LV132-Q100
Quad 2-input NAND Schmitt trigger
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V
V
O
< -0.5 V or V
O
> V
CC
+ 0.5 V
V
O
= -0.5 V to (V
CC
+ 0.5 V)
[1]
[1]
Min
-0.5
-
-
-
-
-50
-65
Max
+7.0
±20
±50
±25
50
-
+150
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SOT108-1 (SO14) package: P
tot
derates linearly with 10.1 mW/K above 100 °C.
For SOT402-1 (TSSOP14) package: P
tot
derates linearly with 7.3 mW/K above 81 °C.
For SOT762-1 (DHVQFN14) package: P
tot
derates linearly with 9.6 mW/K above 98 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
[1]
Conditions
[1]
Min
1.0
0
0
-40
Typ
3.3
-
-
+25
Max
5.5
V
CC
V
CC
+125
Unit
V
V
V
°C
supply voltage
input voltage
output voltage
ambient temperature
The static characteristics are guaranteed from V
CC
= 1.2 V to V
CC
= 5.5 V, but LV devices are guaranteed to function down to
V
CC
= 1.0 V (with input levels GND or V
CC
).
10. Static characteristics
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
OH
Conditions
-40 °C to +85 °C
Min
HIGH-level output V
I
= V
T+
or V
T-
voltage
l
O
= -100 μA; V
CC
= 1.2 V
l
O
= -100 μA; V
CC
= 2.0 V
l
O
= -100 μA; V
CC
= 2.7 V
l
O
= -100 μA; V
CC
= 3.0 V
l
O
= -100 μA; V
CC
= 4.5 V
l
O
= -6 mA; V
CC
= 3.0 V
l
O
= -12 mA; V
CC
= 4.5 V
-
1.8
2.5
2.8
4.3
2.4
3.6
Typ
[1]
1.2
2.0
2.7
3.0
4.5
2.82
4.2
Max
-
-
-
-
-
-
-
-40 °C to +125 °C Unit
Min
-
1.8
2.5
2.8
4.3
2.2
3.5
Max
-
-
-
-
-
-
-
V
V
V
V
V
V
V
74LV132_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 2 — 20 May 2020
4 / 14
Nexperia
74LV132-Q100
Quad 2-input NAND Schmitt trigger
Conditions
V
I
= V
T+
or V
T-
I
O
= 100 μA; V
CC
= 1.2 V
I
O
= 100 μA; V
CC
= 2.0 V
I
O
= 100 μA; V
CC
= 2.7 V
I
O
= 100 μA; V
CC
= 3.0 V
I
O
= 100 μA; V
CC
= 4.5 V
I
O
= 6 mA; V
CC
= 3.0 V
I
O
= 12 mA; V
CC
= 4.5 V
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
0.25
0.35
-
-
-
3.5
-
0.2
0.2
0.2
0.2
0.40
0.55
1.0
20.0
500
-
-
-
-
-
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.2
0.50
0.65
1.0
40
850
-
V
V
V
V
V
V
V
μA
μA
μA
pF
-40 °C to +85 °C
Min
Typ
[1]
Max
-40 °C to +125 °C Unit
Min
Max
Symbol Parameter
V
OL
LOW-level output
voltage
I
I
I
CC
ΔI
CC
C
I
[1]
input leakage
current
supply current
additional supply
current
input capacitance
V
I
= V
CC
or GND; V
CC
= 5.5 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
per input; V
I
= V
CC
- 0.6 V;
V
CC
= 2.7 V to 3.6 V
Typical values are measured at T
amb
= 25 °C.
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see
Fig. 7.
Symbol Parameter
t
pd
propagation
delay
Conditions
nA, nB to nY; see
Fig. 6
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V; C
L
= 15 pF
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
C
PD
power
dissipation
capacitance
C
L
= 50 pF; f
i
= 1 MHz;
V
I
= GND to V
CC
[3]
[3]
[3]
[4]
[2]
-
-
-
-
-
-
-
65
18
15
10
12
9.0
24
-
34
24
-
20
14
-
-
-
-
-
-
-
-
-
43
30
-
25
17
-
ns
ns
ns
ns
ns
ns
pF
-40 °C to +85 °C
Min
Typ
[1]
Max
-40 °C to +125 °C
Min
Max
Unit
[1]
[2]
[3]
[4]
All typical values are measured at T
amb
= 25 °C.
t
pd
is the same as t
PLH
and t
PHL
.
Typical values are measured at nominal supply voltage (V
CC
= 3.3 V and V
CC
= 5.0 V).
C
PD
is used to determine the dynamic power dissipation (P
D
in μW).
2
2
P
D
= C
PD
× V
CC
× f
i
× N + Σ(C
L
× V
CC
× f
o
) where:
f
i
= input frequency in MHz, f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
N = number of inputs switching
2
Σ(C
L
× V
CC
× f
o
) = sum of the outputs.
74LV132_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 2 — 20 May 2020
5 / 14
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
