HIGH-SPEED
16K X 9 DUAL-PORT
STATIC RAM
Features
◆
◆
◆
IDT7016S/L
◆
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
– Commercial:12/15/20/25/35ns (max.)
– Industrial: 20ns (max.)
– Military: 20/25/35ns (max.)
Low-power operation
– IDT7016S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7016L
Active: 750mW (typ.)
Standby: 1mW (typ.)
◆
◆
◆
◆
◆
◆
◆
◆
◆
IDT7016 easily expands data bus width to 18 bits or more
using the Master/Slave select when cascading more than
one device
M/S = V
IH
for
BUSY
output flag on Master
M/S = V
IL
for
BUSY
input on Slave
Busy and Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80-
pin TQFP
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Functional Block Diagram
OE
L
CE
L
R/W
L
OE
R
CE
R
R/W
R
I/O
0L
- I/O
8L
I/O
Control
BUSY
L
A
13L
A
0L
(1,2)
I/O
0R
-I/O
8R
I/O
Control
BUSY
R
Address
Decoder
14
(1,2)
MEMORY
ARRAY
14
Address
Decoder
A
13R
A
0R
CE
L
OE
L
R/W
L
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
OE
R
R/W
R
SEM
L
(2)
INT
L
NOTES:
1. In MASTER mode:
BUSY
is an output and is a push-pull driver
In SLAVE mode:
BUSY
is input.
2.
BUSY
outputs and
INT
outputs are non-tri-stated push-pull drivers.
M/S
3190 drw 01
SEM
R
(2)
INT
R
JANUARY 2009
1
DSC 3190/10
©2009 Integrated Device Technology, Inc.
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Description
The IDT7016 is a high-speed 16K x 9 Dual-Port Static RAM. The
IDT7016 is designed to be used as stand-alone Dual-Port RAMs or as
a combination MASTER/SLAVE Dual-Port RAM for 18-bit-or-more wider
systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-
bit or wider memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by
CE
permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 750mW of power.
The IDT7016 is packaged in a ceramic 68-pin PGA, a 64-pin PLCC
and an 80-pinTQFP (Thin Quad Flatpack). Military grade product is
manufactured in compliance with the latest revision of MIL-PRF-38535
QML, making it ideally suited to military temperature applications demand-
ing the highest level of performance and reliability.
Pin Configurations
(1,2,3)
11/19/01
INDEX
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
9
I/O
1L
I/O
0L
I/O
8L
OE
L
R/W
L
SEM
L
CE
L
N/C
A
13L
V
CC
A
12L
A
11L
A
10L
A
9L
A
8L
A
7L
A
6L
8
7
6
5
4
3
2
1 68 67 66 65 64 63 62 61
60
59
58
57
56
IDT7016J
J68-1(4)
68-Pin PLCC
Top View(5)
55
54
53
52
51
50
49
48
47
46
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
BUSY
L
GND
M/S
BUSY
R
INT
R
A
0R
A
1R
A
2R
A
3R
A
4R
3190 drw 02
,
I/O
7R
I/O
8R
OE
R
R/W
R
SEM
R
CE
R
N/C
A
13R
GND
A
12R
A
11R
A
10R
A
9R
A
8R
A
7R
A
6R
A
5R
Pin Names (7016)
Left Port
CE
L
R/W
L
OE
L
A
0L
- A
13L
I/O
0L
- I/O
8L
SEM
L
INT
L
BUSY
L
CE
R
R/W
R
OE
R
A
0R
- A
13R
I/O
0R
- I/O
8R
SEM
R
INT
R
BUSY
R
M/S
V
CC
GND
Right Port
Chip Enable
Read/Write Enable
Output Enable
Address
Data Input/Output
Semaphore Enable
Interrupt Flag
Busy Flag
Master or Slave Select
Power
Ground
3190 tbl 01
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. Package body is approximately .95 in x .95 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not imply orientation of Part-marking.
Names
2
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Pin Configurations
(1,2,3)
(con't.)
I/O
0L
I/O
8L
I/O
1L
OE
L
R/W
L
SEM
L
CE
L
NC
NC
A
13L
A
12L
V
CC
A
9L
A
8L
A
7L
A
6L
INDEX
79
78
77
76
75
70
69
66
65
64
63
72
62
80
71
68
67
61
74
73
NC
NC
60
59
58
57
56
55
54
11/19/01
A
11L
A
10L
NC
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
NC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
NC
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
BUSY
L
GND
M/S
BUSY
R
INT
R
A
0R
A
1R
A
2R
A
3R
A
4R
NC
NC
,
IDT7016PF
PN80-1(4)
80-Pin TQFP
Top View(5)
53
52
51
50
49
48
47
46
45
44
43
42
21
33
34
27
28
26
30
31
36
24
25
35
37
38
32
29
39
40
20
22
23
41
I/O
7R
I/O
8R
OE
R
NC
NC
R/W
R
SEM
R
A
11R
A
10R
A
13R
GND
A
12R
CE
R
A
9R
A
8R
A
7R
A
6R
A
5R
NC
11/19/01
NC
3190 drw 03
51
11
53
A
7L
55
A
9L
A
5L
52
A
6L
54
A
8L
50
A
4L
49
A
3L
48
A
2L
47
A
1L
46
44
42
40
38
A
0L
BUSY
L
M/S
INT
R
A
1R
45
43
41
39
37
INT
L
GND
BUSY
R
A
0R
A
2R
36
A
3R
35
A
4R
32
A
7R
30
A
9R
34
A
5R
33
A
6R
31
A
8R
10
09
08
57
56
A
11L
A
10L
59
58
V
CC
A
12L
61
60
N/C A
13L
IDT7016G
G68-1(4)
68-Pin PGA
Top View(5)
07
28
29
A
11R
A
10R
26
GND
24
N/C
27
A
12R
25
A
13R
06
63
62
05
SEM
L
CE
L
04
65
64
OE
L
R/W
L
66
67
I/O
0L
I/O
8L
1
3
68
I/O
1L
I/O
2L
I/O
4L
2
4
I/O
3L
I/O
5L
B
C
5
7
9
11
13
15
GND I/O
7L
GND I/O
1R
V
CC
I/O
4R
6
8
I/O
6L
V
CC
D
E
10
12
14
16
I/O
0R
I/O
2R
I/O
3R
I/O
5R
F
G
H
J
22
23
SEM
R
CE
R
20
21
OE
R
R/W
R
18
19
I/O
7R
I/O
8R
17
I/O
6R
K
L
3190 drw 04
03
02
NOTES:
1. All V
CC
pins must be connected to power supply.
01
2. All GND pins must be connected to ground supply.
3. PN80-1 package body is approximately
A
14mm x 14mm x 1.4mm.
INDEX
G68-1 package body is approximately
1.18 in x 1.18 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
,
6.42
3
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Truth Table I: Non-Contention Read/Write Control
Inputs
(1)
CE
H
L
L
X
R/W
X
L
H
X
OE
X
X
L
H
SEM
H
H
H
X
Outputs
I/O
0-8
High-Z
DATA
IN
DATA
OUT
High-Z
Deselcted: Power-Down
Write to Memory
Read Memory
Outputs Disabled
3190 tbl 02
Mode
NOTE:
1.
Condition: A
0L
— A
13L
≠
A
0R
— A
13R
Truth Table II: Semaphore Read/Write Control
(1)
Inputs
CE
H
H
L
R/W
H
↑
X
OE
L
X
X
SEM
L
L
L
Outputs
I/O
0-8
DATA
OUT
DATA
IN
____
Mode
Read Semaphore Flag Data Out (I/O
0
- I/O
8
)
Write I/O
0
into Semaphore Flag
Not Allowed
3190 tbl 03
NOTE:
1. There are eight semaphore flags written to via I/O
0
and read from all I/O
s
(I/O
0
-I/O
8
). These eight semaphores are addressed by A
0
- A
2.
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
Rating
Terminal Voltage
with Respect
to GND
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Commercial
& Industrial
-0.5 to +7.0
Military
-0.5 to +7.0
Unit
V
Maximum Operating
Temperature and Supply Voltage
(1)
Grade
Military
Ambient
Temperature
-55
O
C to +125
O
C
0
O
C to +70
O
C
-40
O
C to +85
O
C
GND
0V
0V
0V
Vcc
5.0V
+
10%
5.0V
+
10%
5.0V
+
10%
3190 tbl 05
T
BIAS
T
STG
I
OUT
-55 to +125
-65 to +150
50
-65 to +135
-65 to +150
50
o
C
C
Commercial
Industrial
o
mA
3190 tbl 04
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect reliability.
2. V
TERM
must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc + 10%.
Recommended DC Operating
Conditions
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
____
____
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
3190 tbl 06
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
4
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Capacitance
(1)
Symbol
C
IN
C
OUT
(T
A
= +25°C, f = 1.0mhz, for TQFP ONLY)
Parameter
Input Capacitance
Output Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
3190 tbl 07
NOTES:
1. This parameter is determined by device characteristics but is not production
tested.
2. 3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V .
DC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
(V
CC
= 5.0V ± 10%)
7016S
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
CC
= 5.5V, V
IN
= 0V to V
CC
CE
= V
IH
, V
OUT
= 0V to V
CC
I
OL
= +4mA
I
OH
= -4mA
Min.
___
7016L
Max.
10
10
0.4
___
Min.
___
Max.
5
5
0.4
___
Unit
µA
µA
V
V
3190 tbl 08
___
___
___
___
2.4
2.4
NOTE:
1. At Vcc < 2.0V, Input leakages are undefined.
Output Loads and AC Test
Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns Max.
1.5V
1.5V
Figures 1 and 2
3190 tbl 09
5V
893Ω
DATA
OUT
BUSY
INT
347Ω
30pF
DATA
OUT
347Ω
5V
893Ω
5pF*
,
3190 drw 06
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig.
6.42
5
FPGA/CPLD
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