Ordering number : ENN*7157
CMOS IC
LC877372A/64A56A/48A
8-Bit Single Chip Microcontroller
LC877372A
8 bit Single Chip Microcontroller incorporating 72KB ROM and 2048 byte RAM on chip
LC877364A
8 bit Single Chip Microcontroller incorporating 64KB ROM and 2048 byte RAM on chip
LC877356A
8 bit Single Chip Microcontroller incorporating 56KB ROM and 2048 byte RAM on chip
LC877348A
8 bit Single Chip Microcontroller incorporating 48KB ROM and 2048 byte RAM on chip
Overview
The LC877372A, LC877364A LC877356A and LC877348A are 8-bit single chip microcontrollers with the
following on-chip functional blocks :
- CPU: operable at a minimum bus cycle time of 100 ns
- On-chip ROM Maximum Capacity : LC877372A 72K bytes
LC877364A 64K bytes
LC877356A 56K bytes
LC877348A 48K bytes
- On-chip RAM capacity: 2048 bytes
- LCD controller / driver
- 16 bit timer / counter (can be divided into two 8 bit timers)
- 16 bit timer / PWM (can be divided into two 8 bit timers)
- Four 8-bit timer with prescalers
- Timer for use as date / time clock
- Synchronous serial I/O port (with automatic block transmit / receive function)
- Asynchronous / synchronous serial I/O port
- 15-channel × 8-bit AD converter
- Small signal detector
Ver:1.03
M2003.
M2003 Nothing (Nothing) SK No.7157-1/26
LC877372A/64A/56A/48A
- High-speed clock counter
- System clock divider
- 18-source 10-vectored interrupt system
Features
(1) Read-Only Memory (ROM)
- 73728 × 8 bits (LC877372A)
- 65536 × 8 bits (LC877364A)
- 57344 × 8 bits (LC877356A)
- 49152 × 8 bits (LC877348A)
(2) Random Access Memory (RAM): 2048 × 9 bits (LC877372A, LC877364A, LC877356A, LC877348A)
(3) Minimum Bus Cycle Time: 100 ns (10 MHz)
Note: The bus cycle time indicates ROM read time.
(4) Minimum Instruction Cycle Time (tCYC) : 300 ns (10MHz)
(5) Ports
- Input/output ports
Data direction programmable for each bit individually :
Data direction programmable in nibble units :
(When N-channel open drain output is selected, data can
- Input ports :
- LCD ports
Segment output :
Common output :
Bias terminals for LCD driver
Other functions
Input/output ports :
Input ports :
- Oscillator pins :
- Reset pin :
- Power supply :
26 (P1n, P30-P35, P70-P73, P8n)
8 (P0n)
be input in bit units.)
2 (XT1,XT2)
48 (S00-S47)
4 (COM0-COM3)
3 (V1-V3)
48(PAn,PBn,PCn,PDn,PEn,PFn)
7 (PLn)
2 (CF1,CF2)
1 (
RES
)
6 (VSS1-3,VDD1-3)
(6) LCD controller
- Seven display modes are available (static, 1/2, 1/3, 1/4 duty × 1/2, 1/3 bias)
- Segment output and common output can be switched to general purpose input/output ports.
(7) Small signal detection (MIC signals etc)
- Counts pulses with the level which is greater than a preset value
- 2 bit counter
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LC877372A/64A/56A/48A
(8) Timers
- Timer 0: 16 bit timer / counter with capture register
Mode 0: 2 channel 8-bit timer with programmable 8 bit prescaler and 8 bit capture register
Mode 1: 8 bit timer with 8 bit programmable prescaler and 8 bit capture register + 8 bit
Counter with 8-bit capture register
Mode 2: 16 bit timer with 8 bit programmable prescaler and 16 bit capture register
Mode 3: 16 bit counter with 16 bit capture register
- Timer 1: PWM / 16 bit timer with toggle output function
Mode 0: 2 channel 8 bit timer (with toggle output)
Mode 1: 2 channel 8 bit PWM
Mode 2: 16 bit timer (with toggle output) Toggle output from lower 8 bits is also possible.
Mode 3: 16 bit timer (with toggle output) Lower order 8 bits can be used as PWM.
- Timer 4: 8-bit timer with 6-bit prescaler
- Timer 5: 8-bit timer with 6-bit prescaler
- Timer 6: 8-bit timer with 6-bit prescaler
- Timer 7: 8-bit timer with 6-bit prescaler
- Base Timer
1) The clock signal can be selected from any of the following :
Sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output from timer 0
2) Interrupts of five different time intervals are possible.
(9) High-speed clock counter
- Countable up to 20 MHz clock (when using 10MHz main clock)
- Real time output
(10) Serial-interface
- SIO 0: 8 bit synchronous serial interface
1) LSB first / MSB first is selectable
2) Internal 8 bit baud-rate generator (fastest clock period 4 / 3 Tcyc)
3) Consecutive automatic data communication (1-256 bits)
- SIO 1: 8 bit asynchronous / synchronous serial interface
Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2–512 Tcyc)
Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8–2048Tcyc)
Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2–512 Tcyc)
Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
(11) AD converter
-8 bits × 15 channels
(12) Remote control receiver circuit (connected to P73 / INT3 / T0IN terminal)
-Noise rejection function (noise rejection filter’s time constant can be selected from 1 / 32 / 128 Tcyc)
(13) Watchdog timer
- The watching time period is determined by an external RC.
- Watchdog timer can produce interrupt or system reset
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LC877372A/64A/56A/48A
(14) Interrupts: 18 sources, 10 vectors
1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling,
an equal or lower priority interrupt request is postponed.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes
precedence. In the case of equal priority levels, the vector with the lowest address takes
precedence.
No.
1
2
3
4
5
6
7
8
9
10
• Priority
Vector
Selectable Level
00003H
X or L
0000BH
X or L
00013H
H or L
0001BH
H or L
00023H
H or L
0002BH
H or L
00033H
H or L
0003BH
H or L
00043H
H or L
0004BH
H or L
Level : X > H > L
Interrupt signal
INT0
INT1
INT2/T0L
INT3/Base timer
T0H
T1L/T1H
SIO0
SIO1
ADC/MIC/T6/T7
Port 0/T4/T5
• For equal priority levels, vector with lowest address takes precedence.
(15) Subroutine stack levels: 1024 levels max.
(16) Multiplication and division
- 16 bit × 8 bit (executed in 5 cycles)
- 24 bit × 16 bit (12 cycles)
- 16 bit ÷ 8 bit (8 cycles)
- 24 bit ÷ 16 bit (12 cycles)
Stack is located in RAM.
(17) Oscillation circuits
- On-chip RC oscillation for system clock use.
- CF oscillation for system clock use. (Rf built in, Rd external)
- Crystal oscillation low speed system clock use. (Rf built in, Rd external)
- On-chip frequency variable RC oscillation circuit for system clock use.
(18) System clock divider
- Low power consumption operation is available
- Minimum instruction cycle time (300ns, 600ns, 1.2µs, 2.4µs, 4.8µs, 9.6µs, 19.2µs, 38.4µs, 76.8µs can
be switched by program (when using 10MHz main clock)
(19) Standby function
- HALT mode
HALT mode is used to reduce power consumption. During the HALT mode, program execution
is stopped but peripheral circuits keep operating (some parts of serial transfer operation stop.)
1) Oscillation circuits are not stopped automatically.
2) Released by the system reset or interrupts.
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LC877372A/64A/56A/48A
-HOLD mode
HOLD mode is used to reduce power consumption. Program execution and peripheral circuits
are stopped.
1) CF, RC and crystal oscillation circuits stop automatically.
2) Released by any of the following conditions.
(1) Low level input to the reset pin
(2) Specified level input to one of INT0, INT1, INT2
(3) Port 0 interrupt
-X’tal HOLD made
X’tal HOLD mode is used to reduce power consumption. Program execution is stopped.
All peripheral circuits except the base timer are stopped.
1) CF and RC oscillation circuits stop automatically.
2) Crystal oscillator operation is kept in its state at HOLD mode inception.
3) Released by any of the following conditions
(1) Low level input to the reset pin
(2) Specified level input to one of INT0, INT1, INT2
(3) Port 0 interrupt
(4) Base-timer interrupt
(20) Package
- QIP100E
- TQFP100
(21) Development tools
- Evaluation chip : LC876093
- Emulator: EVA62S + ECB876600 (Evaluation chip board) + SUB877300 + POD100QFP or
POD100SQFP (Type B):
: ICE-B877300 + SUB877300 + POD100QFPor POD100SQFP (Type B)
- Flash ROM version: LC87F73C8A
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