INTEGRATED CIRCUITS
74ABT574A
Octal D-type flip-flop (3-State)
Product specification
IC23 Data Handbook
1995 May 22
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
FEATURES
•
74ABT574A is flow-through pinout version of 74ABT374
•
Inputs and outputs on opposite side of package allow easy
interface to microprocessors
DESCRIPTION
The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
•
3-State outputs for bus interfacing
•
Power-up 3-State
•
Power-up reset
•
Common output enable
•
Latch-up protection exceeds 500mA per Jedec Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
•
Live insertion/extraction permitted.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
3.0
3.4
3
6
100
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT574A N
74ABT574A D
74ABT574A DB
74ABT574A PW
NORTH AMERICA
74ABT574A N
74ABT574A D
74ABT574A DB
7ABT574APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20 V
CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11
CP
PIN DESCRIPTION
PIN
NUMBER
1
2, 3, 4, 5,
6, 7, 8, 9
19, 18, 17,
16, 15, 14,
13, 12
11
10
20
SYMBOL
OE
D0-D7
FUNCTION
Output enable input (active-Low)
Data inputs
Q0-Q7
CP
GND
V
CC
Data outputs
Clock pulse input (active rising edge)
Ground (0V)
Positive supply voltage
SA00103
1995 May 22
2
853-1509 15261
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
LOGIC SYMBOL
FUNCTION TABLE
INPUTS
OE
CP
↑
↑
↑
Dn
l
h
X
INTERNAL
REGISTER
L
H
NC
OUTPUTS
Q0 – Q7
L
H
NC
OPERATING
MODE
Load and read
register
Hold
2
3
4
5
6
7
8
9
L
L
L
D0
11
CP
D1
D2
D3
D4
D5
D6
D7
1
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
19
18
17
16
15
14
13
12
SA00104
H
↑
X
NC
Z
Disable outputs
↑
H
Dn
Dn
Z
H = High voltage level
h = High voltage level one set-up time prior to the Low–to–High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low–to–High
clock transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↑
= Low-to-High clock transition
↑
= not a Low-to-High clock transition
LOGIC SYMBOL (IEEE/IEC)
1
11
C1
EN
2
3
4
5
6
7
8
9
2D
1
19
18
17
16
15
14
13
12
SA00105
LOGIC DIAGRAM
D0
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
11
CP
1
OE
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
Q5
14
Q6
13
Q7
12
SA00106
1995 May 22
3
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
PARAMETER
Min
4.5
0
2.0
0.8
–32
64
5
+85
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
1995 May 22
4
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
OL
V
RST
I
I
I
OFF
I
PU
/I
PD
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
∆I
CC
Additional supply current per
input pin
2
Quiescent supply current
Low-level output voltage
Power-up output low
voltage
3
Input leakage current
Power-off leakage current
Power-up/down 3-State
output current
4
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.0V; V
O
= 0.5V; V
I
= GND or V
CC;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
–40
100
24
100
0.5
2.5
3.0
2.0
Typ
–0.9
2.9
3.4
2.4
0.42
0.13
±0.01
±5.0
±5.0
5.0
–5.0
5.0
0.55
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
–40
Max
–1.2
2.5
3.0
2.0
0.55
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
T
amb
= –40°C
to +85°C
Min
Max
–1.2
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
µA
mA
µA
mA
UNIT
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10 msec. From V
CC
= 2.1V to V
CC
= 5V
"10%
a
transition time of up to 100
µsec
is permitted.
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Min
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency
Propagation delay
CP to Qn
Output enable time
to High and Low level
Output disable time
from High and Low level
1
1
3
4
3
4
150
1.5
2.0
1.0
2.5
1.8
1.4
T
amb
= +25
o
C
V
CC
= +5.0V
Typ
400
3.0
3.4
2.9
3.8
3.1
2.6
4.4
4.7
4.1
5.2
4.3
3.8
Min
T
amb
= -40 to +85
o
C
V
CC
= +5.0V
±0.5V
Min
150
1.5
2.0
1.0
2.5
1.8
1.4
5.0
5.1
5.0
5.7
5.0
4.0
Max
ns
ns
ns
ns
UNIT
1995 May 22
5
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