79LV0832
8 Megabit (256K x 32-Bit)
Low Voltage EEPROM MCM
Memory
F
EATURES
:
• 256k x 32-bit EEPROM MCM
• R
AD
-P
AK
® radiation-hardened against natural
space radiation
• Total dose hardness:
- >100 krad (Si) - Dependent upon orbit
• Excellent Single event effects @ 25°C
- SEL > 120 MeV cm
2
/mg (Device)
- SEU > 85 MeV cm
2
/mg(Memory Cells)
- SEU > 18 MeV cm
2
/mg (Write Mode)
- SET > 40 MeV cm
2
/mg (Read Mode)
• High endurance
- 10,000 cycles/dword, 10 year data retention
• Page Write Mode: 2 X 128 dword page
• High Speed:
- 200 and 250 ns maximum access times
• Automatic programming
- 15 ms automatic Page/dword write
D
ESCRIPTION
:
Maxwell Technologies’ 79LV0832 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose toler-
ance, dependent upon orbit. Using Maxwell Technologies’ pat-
ented radiation-hardened R
AD
-P
AK
® MCM packaging
technology, the 79LV0832 is the first radiation-hardened 8
megabit MCM EEPROM for space application. The 79LV0832
uses eight 1 Megabit high speed CMOS die to yield an 8
megabit product. The 79LV0832 is capable of in-system elec-
trical dword and page programmability. It has a 128 x 32 byte
page programming function to make its erase and write opera-
tions faster. It also features Data Polling and a Ready/Busy
signal to indicate the completion of erase and programming
operations. In the 79LV0832, hardware data protection is pro-
vided with the RES pin. Software data protection is imple-
mented using the JEDEC standard algorithm.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
®‘ provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to MAxwell Technologies’ self-defined Class
K.
10.10.13 Rev 13
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
©2013 Maxwell Technologies
All rights reserved.
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
TYP
M
AX
7.0
7.0
45
38
3
°
C/W
T
ABLE
2. 79LV0832 A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
Supply Voltage
Input Voltage
Package Weight
Thermal Impedance (RP and RT Packages; XP TBD)
Operating Temperature Range
Storage Temperature Range
1. V
IN
min = -3.0V for pulse width <50ns.
S
YMBOL
V
CC
V
IN
RP
RT
F
JC
T
OPR
T
STG
-55
-65
M
IN
-0.6
-0.5
1
U
NIT
V
V
Grams
125
150
°
C
°
C
T
ABLE
3. 79LV0832 R
ECOMMENDED
DC O
PERATING
C
ONDITIONS
P
ARAMETER
Supply Voltage
Input Voltage
RES_PIN
Operating Temperature Range
1. V
IL
min = -1.0V for pulse width < 50 ns
S
YMBOL
V
CC
V
IL
V
IH
V
H
T
OPR
M
IN
3.0
-0.3
1
2.2
V
CC
-0.5
-55
M
AX
3.6
0.8
V
CC
+0.3
V
CC
+1
125
U
NIT
V
V
V
V
°
C
Memory
T
ABLE
4. D
ELTA
L
IMITS1
P
ARAMETER
I
CC1A
I
CC2A
I
CC2C
I
LI
- ADDR, CE, OE, WE
V
ARIATION2
+/- 10 %
+/- 10 %
+/- 10 %
+/- 10 %
+/- 10 %
I
Lo
- D0 - D31
1. Delta limits are calculated from test data taken at preburn-in and post burn-in as defined in
MIL-STD-883
2. Specified value in Table 6
10.10.13 Rev 13
All data sheets are subject to change without notice
3
©2013 Maxwell Technologies
All rights reserved
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
T
ABLE
6. 79LV0832 DC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Output Voltage
T
EST
C
ONDITION
S
YMBOL
S
UBGROUPS
1, 2, 3
M
IN
--
79LV0832
M
AX
0.4
0.4
--
--
U
NITS
V
V
V
V
V
Data Lines: V
CC
Min, I
OL
= 2.1mA
V
OL
RDY/BSY_Line: V
CC
Min, I
OL
= 12mA
V
OL
Data Lines: V
CC
Min, I
OH
= -400µA
V
OH
RDY/BSY_Line: V
CC
Min, I
OH
= -12mA
V
OH
All Outputs: V
CC
Min, I
OH
=-100uA
1. All Inputs are tied to Vcc with a 5.5KW resistor, except for RES which is 30KW.
2. For RES I
LI
=800uA max.
3. Only one CE active (low) at a time
2.4
2.4
V
CC
-0.3V
T
ABLE
7. 79LV0832 AC E
LECTRICAL
C
HARACTERISTICS FOR
R
EAD
O
PERATION 1
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Address Access Time CE = OE = V
IL
, WE = V
IH
-200
-250
Chip Enable Access Time OE = V
IL
, WE = V
IH
-200
-250
Output Enable Access TIme CE = V
IL
, WE = V
IH
-200
-250
Output Hold to Address Change CE = OE =V
IL
, WE = V
IH
-200
-250
Output Disable to High-Z
2
CE = V
IL
, WE = V
IH
-200
-250
CE = OE = V
IL
, WE = V
IH
-200
-250
RES to Output Delay CE = OE = V
IL
, WE = V
IH3
-200
-250
S
YMBOL
t
ACC
S
UBGROUPS
9, 10, 11
--
--
t
CE
9, 10, 11
--
--
t
OE
9, 10, 11
0
0
t
OH
9, 10, 11
0
0
9, 10, 11
t
DF
0
0
t
DFR
0
0
T
RR
9, 10, 11
0
0
525
550
300
350
ns
50
50
ns
ns
--
--
110
120
ns
200
250
ns
200
250
ns
M
IN
M
AX
U
NIT
ns
Memory
1. Test conditions: input pulse levels = 0.4V to 2.2V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including
scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.
2. t
DF
and t
DFR
are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
10.10.13 Rev 13
All data sheets are subject to change without notice
5
©2013 Maxwell Technologies
All rights reserved
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