14-Bit A/D Converter
AGND
C
REF
REF OUT
V
IN
V
DD
V
DD
7872
16
12
11
13
R
14
R
TRACK/HOLD
9
COMP
3V
REFERENCE
14-BIT DAC
CLK
3
CLOCK
SAR + COUNTER
CONTROL
CONVST
1
2
CONTROL
LOGIC
4
SERIAL
INTERFACE
5
SCLK
6
SDATA
8
DGND
15
V
SS
SSTRB
Logic Diagram
Memory
F
EATURES
:
• 14-bit resolution and accuracy
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Single event effects:
- SEL > 104 MeV/mg/cm
2
- SEU
TH
= 1.4 MeV/mg/cm
2
- SEU
Sat
= 1E-3 cm
2
/Device
• Package:
- 16 pin R
AD
-P
AK
® flat package
- 16 pin R
AD
-P
AK
® dual-in-line package
• Fast Conversion Times: 10 µs
• Low 50 mW typical power consumption
• High speed LC
2
MOS technology
- Analog input range of ±3V
- 83 KSPS throughput rate
- Operates with +5V/-5V power supplies
- 80 dB SNR at 10 kHz input frequency
- 2 s complement coding
- Serial output
D
ESCRIPTION
:
Maxwell Technologies’ 7872 high-speed 14-bit ADC microcir-
cuit features a greater than 100 krad (Si) total dose tolerance;
depending upon orbit. The 7872 consists of a track/hold ampli-
fier, successive-approximation ADC, 3V buried Zener refer-
ence and versatile interface logic. It features a self-contained,
laser- trimmed internal clock, so no external clock timing com-
ponents are required. For minimum noise possible, the on-
chip clock may be overridden to synchronize the device oper-
ation to the digital system. The 7872 is a serial output device.
It is capable of interfacing to all modern microprocessors and
digital signal processors. The 7872 operates from ±5V power
supplies, accepts bipolar input signals of ±3V and is able to
convert full power signals up to 41.5 kHz. It is also fully speci-
fied for dynamic performance parameters including distortion
and signal-to-noise ratio.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
1000573
12.19.01 Rev 4
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
©2001 Maxwell Technologies
All rights reserved.
14-Bit A/D Converter
7872
T
ABLE
1. 7872 P
IN
D
ESCRIPTION
P
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
IGNAL
CONTROL
CONVST
CLK
SSTRB
SCLK
SDATA
NC
DGND
V
DD
NC
C
REF
AGND
REF
OUT
V
IN
V
SS
V
DD
D
ESCRIPTION
Control Function
Convert Start
Clock Input
Serial Strobe
Serial Clock
Serial Data
Non Connect
Digital Ground
Positive Supply
No Connect
Reference Capacitor
Analog Ground
Voltage Reference Output
Analog Input
Negative Supply
Positive Supply
Memory
T
ABLE
2. 7872 A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
Positive Supply Voltage; Relative to GND
Negative Supply Voltage; Relative to GND
AGND to DGND; Relative to GND
REF
OUT
, C
REF
to AGND
V
IN
to AGND
Digital Input Voltage
Digital Output Voltage
Thermal Impedance
Storage Temperature Range
Operating Temperature Range
S
YMBOL
V
DD
V
SS
--
--
--
V
IN
V
OUT
M
IN
-0.3
0.3
-0.3
0
V
SS
-0.3
-0.3
-0.3
--
-65
-55
M
AX
7.0
7.0
V
DD
+0.3
V
DD
V
DD
+0.3
V
DD
+0.3
V
DD
+0.3
2.44
150
125
U
NIT
V
V
V
V
V
V
V
°C/W
°C
°C
Θ
JC
T
S
T
A
1000573
12.19.01 Rev 4
All data sheets are subject to change without notice
2
©2001 Maxwell Technologies
All rights reserved.
14-Bit A/D Converter
T
ABLE
3. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
D
YNAMIC
P
ERFORMANCE 1
7872
(V
DD
= 5 V ± 5%, V
SS
= -5 V ± 5%, AGND = DGND = 0 V, f
CLK
= 2 MH
Z EXTERNAL
, f
SAMPLE
= 83
K
H
Z
, -55
TO
125
°
C
UNLESS OTHERWISE
SPECIFIED
)
P
ARAMETER
Signal to Noise Ratio V
IN
= 10kHz Sine Wave, T
MIN
to
T
MAX
;
SNR is typically 82dB for V
IN
< 41.5kHz
2
Total Harmonic Distortion V
IN
= 10kHz Sine Wave
Peak Harmonic or Spurious Noise
Intermodulation Distortion
Second Order Terms: f
a
= 9 kHz, f
b
= 9.5 kHz, f
SAMPLE
= 50 kHz
Third Order Terms: f
a
= 9 kHz, f
b
= 9.5 kHz, f
SAMPLE
=
50 kHz
Track/Hold Acquisition Time
1. V
IN
= ± 3 V. Guaranteed by design.
2. SNR calculation includes distortion and noise components.
S
YMBOL
SNR
M
IN
79
T
YP
--
M
AX
--
U
NIT
dB
THD
--
IMD
--
--
--
--
-86
-86
-86
-86
--
--
--
--
dB
dB
dB
--
--
--
2
µs
Memory
T
ABLE
4. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
A
CCURACY
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Resolution
Resolution for Which No Missing Codes are Guaran-
teed
Integral Nonlinearity @ 25
°
C
Integral Nonlinearity T
MIN
to T
MAX
Bipolar Zero Error
Positive Gain Error
1
Negative Gain Error
1
1. Measured with respect to internal reference.
S
YMBOL
--
--
--
--
--
--
--
M
IN
14
14
--
--
--
--
--
T
YP
--
--
±1
--
--
--
--
M
AX
--
--
--
±2
±12
±12
±12
U
NIT
Bits
Bits
LSB
LSB
LSB
LSB
LSB
T
ABLE
5. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
A
NALOG
I
NPUT
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Input Voltage Range
Input Current
S
YMBOL
--
--
M
IN
-3
-500
M
AX
3
500
U
NITS
V
µA
1000573
12.19.01 Rev 4
All data sheets are subject to change without notice
3
©2001 Maxwell Technologies
All rights reserved.
14-Bit A/D Converter
T
ABLE
6. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
R
EFERENCE
O
UTPUT
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
REF
OUT
@ +25
°
C
REF
OUT
T
MIN
to T
MAX
REF
OUT
Tempco: Typically 35ppm
Reference Load Sensitivity (DREF
OUT
/DI) Reference Load Current
Change (0-300 µA); Reference Load Should Not Be Changed Dur-
ing Conversion
S
YMBOL
--
--
--
--
M
IN
2.99
2.98
--
--
M
AX
3.01
3.02
±40
1.2
7872
U
NIT
V
V
ppm/
o
C
mV
T
ABLE
7. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
L
OGIC
I
NPUTS
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Input High Voltage: V
DD
5 V ± 5%
Input Low Voltage: V
DD
5 V ± 5%
Input Current: V
IN
= 0 V to V
DD
Input Current: (14/8/CLK input only) VIN = VSS to VDD
Input Capacitance
1
1. Not tested.
S
YMBOL
V
INH
V
INL
I
IN
--
C
IN
M
IN
2.4
--
-10
-10
--
M
AX
--
0.8
10
10
10
U
NIT
V
V
µA
µA
pF
Memory
T
ABLE
8. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
L
OGIC
O
UTPUTS
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Output High Voltage I
SOURCE
= 40 µA
Output Low Voltage I
SINK
= 1.6 mA
Floating-State Leakage Current
Floating-State Output Capacitance
1
1. Not tested.
S
YMBOL
V
OH
V
OL
--
--
M
IN
4.0
--
--
--
M
AX
--
0.4
10
15
U
NIT
V
V
µA
pF
T
ABLE
9. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
C
ONVERSION
T
IME
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
External Clock
Internal Clock: Nominal Value = 2 MHz
S
YMBOL
--
--
M
IN
--
--
M
AX
10
11
U
NIT
µs
µs
1000573
12.19.01 Rev 4
All data sheets are subject to change without notice
4
©2001 Maxwell Technologies
All rights reserved.
14-Bit A/D Converter
T
ABLE
10. 7872 DC E
LECTRICAL
C
HARACTERISTICS FOR
P
OWER
R
EQUIREMENTS
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Negative Supply Current
Power Dissipation
S
YMBOL
V
DD
V
SS
I
DD
I
SS
P
D
C
ONDITIONS
5% for Specified Performance
5% for Specified Performance
Typically 6mA
Typically 4mA
Typically 50mW
R
EQUIREMENTS
5
-5
13
6
95
7872
U
NITS
V
V
mA max
mA max
mW max
T
ABLE
11. 7872 T
IMING
C
HARACTERISTICS 1,2
(V
DD
= 5V ±5%, V
SS
= -5 V ± 5%, T
A
= -55
TO
125 °C
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
/C
ONDITION
CONVST Pulse Width
SSTRB to SCLK Falling Edge Setup Time
SCLK Cycle Time
3
SCLK to Valid Data Delay: C
L
= 35 pF
4
SCLD Rising Edge to SSTRB
Bus Relinquish Time After SCLK
S
YMBOL
t
1
t
10
t
11
t
12
t
13
t
14
M
IN
50
100
440
--
20
4
M
AX
--
--
--
155
150
100
U
NITS
ns
ns
ns
ns
ns
ns
Memory
1. All input signals are specified with tr = tr = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2. Serial timing is measured with a 4.7 k
Ω
pull-up resistor on SDATA and SSTRB and a 2 k
Ω
pull-up resistor on SCLK. The
capacitance on all three outputs is 35 pF.
3. SCLK mark/space ration (measured from a voltage level of 1.6 V) is 40/60 to 60/40.
4. SDATA will drive higher capacitive loads, but this will add to t
12
since it increases the external RC time constant (4.7k
Ω
/C
L
)
and hence, the time to reach 2.4 V.
1000573
12.19.01 Rev 4
All data sheets are subject to change without notice
5
©2001 Maxwell Technologies
All rights reserved.
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