Preliminary
RJK03C1DPB
Silicon N Channel Power MOS FET with Schottky Barrier Diode
REJ03G1830-0310
Power Switching
Rev.3.10
Sep 29, 2009
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
R
DS(on)
= 1.7 m
Ω
typ. (at V
GS
= 10 V)
•
Pb-free
•
Halogen-free
•
•
•
•
•
Outline
RENESAS Package code: PTZZ0005DA-A
(Package name: LFPAK)
5 6 7 8
D D D D
5
4
4
G
3
12
1, 2, 3
4
5
Source
Gate
Drain
S S S
1 2 3
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to Case Thermal Resistance
Channel temperature
Storage temperature
Notes: 1. PW
≤
10
μs,
duty cycle
≤
1%
2. Value at Tch = 25°C, Rg
≥
50
Ω
3. Tc = 25°C
Symbol
V
DSS
V
GSS
I
D
I
D(pulse)
I
DR
I
AP Note 2
E
AR Note 2
Pch
Note3
θch-C
Tch
Tstg
Note1
Ratings
30
±20
60
240
60
28
78.4
65
1.92
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
°C/W
°C
°C
REJ03G1830-0310 Rev.3.10 Sep 29, 2009
Page 1 of 6
RJK03C1DPB
Preliminary
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown
voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Gate Resistance
Total gate charge
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse
recovery time
Notes: 4. Pulse test
Symbol
V
(BR)DSS
I
GSS
I
DSS
V
GS(off)
R
DS(on)
R
DS(on)
|y
fs
|
Ciss
Coss
Crss
Rg
Qg
Qgs
Qgd
t
d(on)
t
r
t
d(off)
t
f
V
DF
t
rr
Min
30
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
1.7
2.2
120
6000
1230
550
0.5
42
18
16
18
19
75
15
0.39
40
Max
—
±0.5
1
2.5
2.2
3.1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
V
μA
mA
V
mΩ
mΩ
S
pF
pF
pF
Ω
nC
nC
nC
ns
ns
ns
ns
V
ns
Test Conditions
I
D
= 10 mA, V
GS
= 0
V
GS
=
±20
V, V
DS
= 0
V
DS
= 30 V, V
GS
= 0
V
DS
= 10 V, I
D
= 1 mA
I
D
= 30 A, V
GS
= 10 V
Note4
I
D
= 30 A, V
GS
= 4.5 V
Note4
I
D
= 30 A, V
DS
= 10 V
Note4
V
DS
= 10 V, V
GS
= 0,
f = 1 MHz
V
DD
= 10 V, V
GS
= 4.5 V,
I
D
= 60 A
V
GS
= 10 V, I
D
= 30 A,
V
DD
≅
10 V, R
L
= 0.33
Ω,
Rg = 4.7
Ω
I
F
= 2 A, V
GS
= 0
Note4
I
F
= 60 A, V
GS
= 0
di
F
/ dt = 100 A/
μs
REJ03G1830-0310 Rev.3.10 Sep 29, 2009
Page 2 of 6
RJK03C1DPB
Preliminary
Main Characteristics
Power vs. Temperature Derating
80
1000
Maximum Safe Operation Area
Pch (W)
I
D
(A)
60
100
Channel Dissipation
1 ms
Drain Current
40
10
PW = 10 ms
DC
a
er
Op
20
1
Operation in
this area is
limited by R
DS(on)
n
tio
0
50
100
150
200
Tc = 25°C
0.1 1 shot Pulse
0.1
1
10
100
Case Temperature
Tc (°C)
Drain to Source Voltage
V
DS
(V)
Typical Output Characteristics
100
4.5 V
10 V
Pulse Test
2.8 V
100
Typical Transfer Characteristics
V
DS
= 10 V
Pulse Test
I
D
(A)
60
2.6 V
I
D
(A)
Drain Current
80
80
60
Drain Current
40
2.4 V
40
25°C
Tc = 75°C
–25°C
20
20
V
GS
= 2.2 V
0
2
4
6
8
10
0
1
2
3
4
5
Drain to Source Voltage
V
DS
(V)
Gate to Source Voltage
V
GS
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
10
Pulse Test
Drain to Source Saturation Voltage
V
DS (on)
(mV)
200
Pulse Test
3
150
V
GS
= 4.5 V
10 V
100
1
50
I
D
= 20 A
10 A
5A
0.3
0
0.1
20
1
3
10
30
100
300 1000
4
8
12
16
Gate to Source Voltage
V
GS
(V)
Drain Current
I
D
(A)
REJ03G1830-0310 Rev.3.10 Sep 29, 2009
Page 3 of 6
RJK03C1DPB
Static Drain to Source on State Resistance
vs. Temperature
10
Pulse Test
10000
3000
Preliminary
Typical Capacitance vs.
Drain to Source Voltage
Ciss
Capacitance C (pF)
8
1000
Coss
300
100
30
V
GS
= 0
f = 1 MHz
10
20
30
Crss
6
I
D
= 5 A, 10 A, 20 A
V
GS
= 4.5 V
2
10 V
0
–25
0
25
50
5 A, 10 A, 20 A
75
100 125 150
4
10
0
Case Temperature
Tc
(
°
C)
Drain to Source Voltage V
DS
(V)
Reverse Drain Current vs.
Source to Drain Voltage
Dynamic Input Characteristics
V
DS
(V)
V
GS
V
DD
= 25 V
10 V
16
Reverse Drain Current I
DR
(A)
I
D
= 60 A
V
GS
(V)
50
20
100
Pulse Test
10 V
80
5V
40
Drain to Source Voltage
30
V
DS
20
12
Gate to Source Voltage
60
8
40
V
GS
= 0, –5V
10
V
DD
= 25 V
10 V
0
40
80
120
160
4
20
0
0
200
0
0.4
0.8
1.2
1.6
2.0
Gate Charge
Qg (nc)
Source to Drain Voltage V
SD
(V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Repetitive Avalanche Energy E
AR
(mJ)
100
80
60
40
20
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
REJ03G1830-0310 Rev.3.10 Sep 29, 2009
Page 4 of 6
RJK03C1DPB
Normalized Transient Thermal Impedance vs. Pulse Width
3
Tc = 25°C
1
D=1
0.3
Preliminary
0.5
0.2
0.1
0.1
0.03
0.05
2
0.0
lse
01
t pu
0.
o
h
1s
1m
10 m
P
DM
PW
T
100 m
1
D=
PW
T
0.01
10
Pulse Width PW (s)
Avalanche Test Circuit
Avalanche Waveform
1
2
L
•
I
AP2
•
V
DSS
V
DSS
– V
DD
V
(BR)DSS
I
AP
V
DD
V
DS
V
DS
Monitor
L
I
AP
Monitor
E
AR
=
Rg
D. U. T
I
D
Vin
15 V
0
V
DD
Switching Time Test Circuit
Vin Monitor
D.U.T.
Rg
R
L
V
DS
= 10 V
Vin
Vout
Vin
10 V
Vout
Monitor
Switching Time Waveform
90%
10%
10%
10%
90%
td(on)
tr
90%
td(off)
tf
REJ03G1830-0310 Rev.3.10 Sep 29, 2009
Page 5 of 6
stm32/stm8
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