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RHRXH162373K-01Q: 产品描述Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs; 产品类别逻辑逻辑; 文件大小473KB，共17页; 制造商ST(意法半导体); 官网地址http://www.st.com/

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RHRXH162373K-01Q概述

Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs

RHRXH162373K-01Q规格参数

参数名称	属性值
是否无铅	含铅
是否Rohs认证	不符合
厂商名称	ST(意法半导体)
零件包装代码	DFP
包装说明	DFP, FL48,.4,25
针数	48
Reach Compliance Code	_compli
系列	ALVC/VCX/A
JESD-30 代码	R-CDFP-F48
JESD-609代码	e0
长度	15.75 mm
负载电容（CL）	30 pF
逻辑集成电路类型	BUS DRIVER
最大I（ol）	0.008 A
位数	8
功能数量	2
端口数量	2
端子数量	48
最高工作温度	125 °C
最低工作温度	-55 °C
输出特性	3-STATE WITH SERIES RESISTOR
输出极性	TRUE
封装主体材料	CERAMIC, METAL-SEALED COFIRED
封装代码	DFP
封装等效代码	FL48,.4,25
封装形状	RECTANGULAR
封装形式	FLATPACK
峰值回流温度（摄氏度）	NOT SPECIFIED
电源	2.5/3.3 V
传播延迟（tpd）	5.7 ns
认证状态	Not Qualified
筛选级别	MIL-PRF-38535 Class Q
座面最大高度	2.72 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1.8 V
标称供电电压 (Vsup)	2.3 V
表面贴装	YES
技术	CMOS
温度等级	MILITARY
端子面层	Tin/Lead (Sn/Pb)
端子形式	FLAT
端子节距	0.635 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
总剂量	100k Rad(Si) V
宽度	9.65 mm

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54VCXH162373

Rad hard low voltage CMOS 16-bit D-type latch (3-state)

with 3.6V tolerant inputs and outputs

Features

■

1.65 to 3.6V inputs and outputs

High speed:

– t

= 3.3ns (Max) at V

= 3.0 to 3.6V

– t

= 4.5ns (Max) at V

= 2.3 to 2.7V

Symmetrical impedance outputs:

– |I

| = I

= 12mA (Min) at V

= 3.0V

– |I

| = I

= 8mA (Min) at V

= 2.3V

Power down protection on inputs and outputs

26Ω serie resistors in outputs

Operating voltage range:

– V

(Opr) = 1.65V to 3.6V

Pin and function compatible with 54 SERIES

HR162373

Bus hold provided on both sides

Cold spare function

Latch-up performance exceeds

300mA (JESD 17)

ESD performance:

– HBM > 2000V

(MIL STD 883 method 3015); MM > 200V

300KRad Mil1019.6 Condition A, (RHA QML

qualification extension undergone)

No SEL, no SEU under 72 Mev/cm2/mg LET

heavy ions irradiation

QML qualified product

Device fully compliant with

DSCC SMD 5962-05211

Flat-48

■

Description

The 54VCXH162373 is a low voltage CMOS 16

bit d-type latch with 3 state outputs non inverting

fabricated with sub-micron silicon gate and five-

layer metal wiring C

MOS technology. It is ideal

for low power and very high speed 1.65 to 3.6V

applications; it can be interfaced to 3.6V signal

environment for both inputs and outputs.

These 16 bit D-TYPE latches are bite controlled

by two latch enable inputs (nLE) and two output

enable inputs (OE).

While the nLE input is held at a high level, the nQ

outputs will follow the data input precisely.

When the nLE is taken low, the nQ outputs will be

in a normal logic state (high or low logic level) and

while high level the outputs will be in a high

impedance state. Bus hold on data inputs is

provided in order to eliminate the need for

external pull-up or pull-down resistor. The device

circuits is including 26Ω series resistance in the

outputs. These resistors permit to reduce line

noise in high speed applications.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

■

July 2007

Rev 4

1/17

www.st.com

RHRXH162373K-01Q相似产品对比

	RHRXH162373K-01Q	54VCXH162373	RHRXH162373K-02V	RHFXH162373K-01V	RHFXH162373K-01Q	RHRXH162373K-02Q
描述	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs	Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs
厂商名称	ST(意法半导体)	-	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)	ST(意法半导体)
零件包装代码	DFP	-	DFP	DFP	DFP	DFP
包装说明	DFP, FL48,.4,25	-	DFP, FL48,.4,25	DFP, FL48,.4,25	DFP, FL48,.4,25	DFP, FL48,.4,25
针数	48	-	48	48	48	48
Reach Compliance Code	_compli	-	_compli	compli	compli	_compli
系列	ALVC/VCX/A	-	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A
JESD-30 代码	R-CDFP-F48	-	R-CDFP-F48	R-CDFP-F48	R-CDFP-F48	R-CDFP-F48
长度	15.75 mm	-	15.75 mm	15.75 mm	15.75 mm	15.75 mm
负载电容（CL）	30 pF	-	30 pF	30 pF	30 pF	30 pF
逻辑集成电路类型	BUS DRIVER	-	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
最大I（ol）	0.008 A	-	0.008 A	0.008 A	0.008 A	0.008 A
位数	8	-	8	8	8	8
功能数量	2	-	2	2	2	2
端口数量	2	-	2	2	2	2
端子数量	48	-	48	48	48	48
最高工作温度	125 °C	-	125 °C	125 °C	125 °C	125 °C
最低工作温度	-55 °C	-	-55 °C	-55 °C	-55 °C	-55 °C
输出特性	3-STATE WITH SERIES RESISTOR	-	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR
输出极性	TRUE	-	TRUE	TRUE	TRUE	TRUE
封装主体材料	CERAMIC, METAL-SEALED COFIRED	-	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
封装代码	DFP	-	DFP	DFP	DFP	DFP
封装等效代码	FL48,.4,25	-	FL48,.4,25	FL48,.4,25	FL48,.4,25	FL48,.4,25
封装形状	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	FLATPACK	-	FLATPACK	FLATPACK	FLATPACK	FLATPACK
电源	2.5/3.3 V	-	2.5/3.3 V	2.5/3.3 V	2.5/3.3 V	2.5/3.3 V
传播延迟（tpd）	5.7 ns	-	5.7 ns	5.7 ns	5.7 ns	5.7 ns
认证状态	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
筛选级别	MIL-PRF-38535 Class Q	-	MIL-PRF-38535 Class V	MIL-PRF-38535 Class V	MIL-PRF-38535 Class Q	MIL-PRF-38535 Class Q
座面最大高度	2.72 mm	-	2.72 mm	2.72 mm	2.72 mm	2.72 mm
最大供电电压 (Vsup)	3.6 V	-	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1.8 V	-	1.8 V	1.8 V	1.8 V	1.8 V
标称供电电压 (Vsup)	2.3 V	-	2.3 V	2.3 V	2.3 V	2.3 V
表面贴装	YES	-	YES	YES	YES	YES
技术	CMOS	-	CMOS	CMOS	CMOS	CMOS
温度等级	MILITARY	-	MILITARY	MILITARY	MILITARY	MILITARY
端子形式	FLAT	-	FLAT	FLAT	FLAT	FLAT
端子节距	0.635 mm	-	0.635 mm	0.635 mm	0.635 mm	0.635 mm
端子位置	DUAL	-	DUAL	DUAL	DUAL	DUAL
总剂量	100k Rad(Si) V	-	100k Rad(Si) V	300k Rad(Si) V	300k Rad(Si) V	100k Rad(Si) V
宽度	9.65 mm	-	9.65 mm	9.65 mm	9.65 mm	9.65 mm

RHRXH162373K-01Q

RHRXH162373K-01Q概述

RHRXH162373K-01Q规格参数

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