74AUP1G02
Low-power 2-input NOR gate
Rev. 01 — 18 July 2005
Product data sheet
1. General description
The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G02 provides the single 2-input NOR function.
2. Features
s
Wide supply voltage range from 0.8 V to 3.6 V
s
High noise immunity
s
Complies with JEDEC standards:
x
JESD8-12 (0.8 V to 1.3 V)
x
JESD8-11 (0.9 V to 1.65 V)
x
JESD8-7 (1.2 V to 1.95 V)
x
JESD8-5 (1.8 V to 2.7 V)
x
JESD8-B (2.7 V to 3.6 V)
s
ESD protection:
x
HBM JESD22-A114-C exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
x
CDM JESD22-C101-C exceeds 1000 V
s
Low static power consumption; I
CC
= 0.9
µA
(maximum)
s
Latch-up performance exceeds 100 mA per JESD 78 Class II
s
Inputs accept voltages up to 3.6 V
s
Low noise overshoot and undershoot < 10 % of V
CC
s
I
OFF
circuitry provides partial Power-down mode operation
s
Multiple package options
s
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
Philips Semiconductors
74AUP1G02
Low-power 2-input NOR gate
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
3 ns.
Symbol
Parameter
Conditions
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 0.8 V
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 1.1 V to 1.3 V
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 1.4 V to 1.6 V
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 1.65 V to 1.95 V
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 2.3 V to 2.7 V
C
L
= 5 pF; R
L
= 1 MΩ;
V
CC
= 3.0 V to 3.6 V
C
i
C
PD
input capacitance
power dissipation
capacitance
V
CC
= 1.8 V; f = 10 MHz
V
CC
= 3.3 V; f = 10 MHz
[1] [2]
[1] [2]
Min
-
2.5
1.6
1.3
1.0
1.0
-
-
-
Typ
17.0
5.1
3.7
3.0
2.4
2.2
0.8
3.4
4.3
Max
-
10.8
6.7
5.3
3.9
3.4
-
-
-
Unit
ns
ns
ns
ns
ns
ns
pF
pF
pF
t
PHL
, t
PLH
propagation delay
A or B to Y
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
[2]
The condition is V
I
= GND to V
CC
.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74AUP1G02GW
74AUP1G02GM
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP5
XSON6
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
Version
SOT353-1
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
×
1.45
×
0.5 mm
5. Marking
Table 3:
Marking
Marking code
pB
pB
Type number
74AUP1G02GW
74AUP1G02GM
9397 750 14671
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 18 July 2005
2 of 16
Philips Semiconductors
74AUP1G02
Low-power 2-input NOR gate
6. Functional diagram
1
2
B
A
Y
4
1
2
≥1
4
mna103
mna165
Fig 1. Logic symbol
Fig 2. IEC logic symbol
B
Y
A
mna166
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
02
B
B
A
1
2
5
V
CC
1
6
V
CC
A
2
5
n.c.
02
GND
3
4
Y
4
001aab610
GND
3
Y
001aab611
Transparent top view
Fig 4. Pin configuration SOT353-1
(TSSOP5)
Fig 5. Pin configuration SOT886 (XSON6)
7.2 Pin description
Table 4:
Symbol
B
A
GND
Y
n.c.
V
CC
Pin description
Pin
TSSOP5
1
2
3
4
-
5
XSON6
1
2
3
4
5
6
data input B
data input A
ground (0 V)
data output Y
not connected
supply voltage
Description
9397 750 14671
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 18 July 2005
3 of 16
Philips Semiconductors
74AUP1G02
Low-power 2-input NOR gate
8. Functional description
8.1 Function table
Table 5:
Input
A
L
L
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
[1]
Output
B
L
H
L
H
Y
H
L
L
L
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping
current
input voltage
output clamping
current
output voltage
output current
quiescent supply
current
ground current
storage temperature
total power
dissipation
Conditions
V
I
< 0 V
[1]
Min
−0.5
-
−0.5
-
[1]
[1]
Max
+4.6
−50
+4.6
±50
Unit
V
mA
V
mA
V
O
> V
CC
or V
O
< 0 V
active mode
Power-down mode
V
O
= 0 V to V
CC
−0.5
−0.5
-
-
-
−65
V
CC
+ 0.5 V
+4.6
±20
+50
−50
+150
250
V
mA
mA
mA
°C
mW
T
amb
=
−40 °C
to +125
°C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP5 packages: above 87.5
°C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 packages: above 45
°C
the value of P
tot
derates linearly with 2.4 mW/K.
9397 750 14671
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 18 July 2005
4 of 16
Philips Semiconductors
74AUP1G02
Low-power 2-input NOR gate
10. Recommended operating conditions
Table 7:
Symbol
V
CC
V
I
V
O
T
amb
t
r
, t
f
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input rise and fall times
V
CC
= 0.8 V to 3.6 V
active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.8
0
0
0
−40
0
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
°C
ns/V
11. Static characteristics
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
°C
V
IH
HIGH-state input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
IL
LOW-state input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
OH
HIGH-state output voltage
V
I
= V
IH
or V
IL
I
O
=
−20 µA;
V
CC
= 0.8 V to 3.6 V
I
O
=
−1.1
mA; V
CC
= 1.1 V
I
O
=
−1.7
mA; V
CC
= 1.4 V
I
O
=
−1.9
mA; V
CC
= 1.65 V
I
O
=
−2.3
mA; V
CC
= 2.3 V
I
O
=
−3.1
mA; V
CC
= 2.3 V
I
O
=
−2.7
mA; V
CC
= 3.0 V
I
O
=
−4.0
mA; V
CC
= 3.0 V
V
OL
LOW-state output voltage
V
I
= V
IH
or V
IL
I
O
= 20
µA;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
9397 750 14671
Conditions
Min
Typ
Max
-
-
-
-
Unit
V
V
V
V
0.70
×
V
CC
-
0.65
×
V
CC
-
1.6
2.0
-
-
-
-
V
CC
−
0.1
1.11
1.32
2.05
1.9
2.72
2.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.30
×
V
CC
V
0.35
×
V
CC
V
0.7
0.9
-
-
-
-
-
-
-
-
0.1
0.3
×
V
CC
0.31
0.31
0.31
0.44
0.31
0.44
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
0.75
×
V
CC
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 18 July 2005
5 of 16
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