Numonyx™ StrataFlash
(P30)
®
Embedded Memory
Datasheet
Product Features
High performance
— 85 ns initial access
— 52 MHz with zero wait states, 17ns clock-to-data output
synchronous-burst read mode
— 25 ns asynchronous-page read mode
— 4-, 8-, 16-, and continuous-word burst mode
— Buffered Enhanced Factory Programming (BEFP) at 5
μs/
byte (Typ)
— 1.8 V buffered programming at 7
μs/byte
(Typ)
— Multi-Level Cell Technology: Highest Density at Lowest
Cost
— Asymmetrically-blocked architecture
— Four 32-KByte parameter blocks: top or bottom
configuration
— 128-KByte main blocks
Security
— One-Time Programmable Registers:
• 64 unique factory device identifier bits
• 2112 user-programmable OTP bits
— Selectable OTP Space in Main Array:
• Four pre-defined 128-KByte blocks (top or bottom
configuration)
• Up to Full Array OTP Lockout
— Absolute write protection: V
PP
= V
SS
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down
Architecture
Software
— 20
μs
(Typ) program suspend
— 20
μs
(Typ) erase suspend
— Numonyx™ Flash Data Integrator optimized
— Basic Command Set and Extended Command Set
compatible
— Common Flash Interface capable
Voltage and Power
— V
CC
(core) voltage: 1.7 V – 2.0 V
— V
CCQ
(I/O) voltage: 1.7 V – 3.6 V
— Standby current: 20μA (Typ) for 64-Mbit
— 4-Word synchronous read current:
13 mA (Typ) at 40 MHz
Quality and Reliability
— Operating temperature: –40 °C to +85 °C
— Minimum 100,000 erase cycles per block
— ETOX™ VIII process technology
Density and Packaging
— 56- Lead TSOP package (64, 128, 256,
512- Mbit)
— 64- Ball Numonyx™ Easy BGA package (64,
128, 256, 512- Mbit)
— Numonyx™ QUAD+ SCSP (64, 128, 256,
512- Mbit)
— 16-bit wide data bus
Order Number: 306666-11
November 2007
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND
CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A
PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx
products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Legal L ines and D isc laim er s
Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.
Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented
subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or
otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting
Numonyx's website at
http://www.numonyx.com.
Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007, Numonyx, B.V., All Rights Reserved.
Datasheet
2
November 2007
Order Number: 306666-11
P30
Contents
1.0
Introduction
.............................................................................................................. 6
1.1
Nomenclature ..................................................................................................... 6
1.2
Acronyms........................................................................................................... 6
1.3
Conventions ....................................................................................................... 7
Functional Overview
.................................................................................................. 8
2.1
Virtual Chip Enable Description.............................................................................. 8
Package Information
............................................................................................... 10
3.1
56-Lead TSOP................................................................................................... 10
3.2
64-Ball Easy BGA Package .................................................................................. 11
3.3
QUAD+ SCSP Packages ...................................................................................... 13
Ballout and Signal Descriptions
............................................................................... 16
4.1
Signal Ballout ................................................................................................... 16
4.2
Signal Descriptions ............................................................................................ 19
4.3
Dual-Die Configurations ..................................................................................... 21
4.4
Memory Maps ................................................................................................... 22
Maximum Ratings and Operating Conditions............................................................
25
5.1
Absolute Maximum Ratings................................................................................. 25
5.2
Operating Conditions ......................................................................................... 25
Electrical Specifications
........................................................................................... 26
6.1
DC Current Characteristics.................................................................................. 26
6.2
DC Voltage Characteristics.................................................................................. 27
AC Characteristics
................................................................................................... 28
7.1
AC Test Conditions ............................................................................................ 28
7.2
Capacitance...................................................................................................... 29
7.3
AC Read Specifications....................................................................................... 29
7.4
AC Write Specifications ...................................................................................... 36
7.5
Program and Erase Characteristics....................................................................... 39
Power and Reset Specifications
............................................................................... 41
8.1
Power-Up and Power-Down................................................................................. 41
8.2
Reset Specifications........................................................................................... 41
8.3
Power Supply Decoupling ................................................................................... 42
Device Operations
................................................................................................... 43
9.1
Bus Operations ................................................................................................. 43
9.1.1 Reads ................................................................................................... 43
9.1.2 Writes................................................................................................... 44
9.1.3 Output Disable ....................................................................................... 44
9.1.4 Standby ................................................................................................ 44
9.1.5 Reset.................................................................................................... 44
9.2
Device Commands............................................................................................. 45
9.3
Command Definitions......................................................................................... 46
Operations
...................................................................................................... 48
Asynchronous Page-Mode Read ........................................................................... 48
Synchronous Burst-Mode Read............................................................................ 48
Read Configuration Register................................................................................ 49
10.3.1 Read Mode ............................................................................................ 50
10.3.2 Latency Count........................................................................................ 50
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0 Read
10.1
10.2
10.3
November 2007
Order Number: 306666-11
Datasheet
3
P30
10.3.3 WAIT Polarity .........................................................................................52
10.3.4 Data Hold ..............................................................................................53
10.3.5 WAIT Delay............................................................................................53
10.3.6 Burst Sequence ......................................................................................54
10.3.7 Clock Edge.............................................................................................54
10.3.8 Burst Wrap ............................................................................................55
10.3.9 Burst Length ..........................................................................................55
10.3.10 End of Word Line (EOWL) Considerations ...................................................55
11.0 Programming Operations
.........................................................................................56
11.1 Word Programming ............................................................................................56
11.1.1 Factory Word Programming......................................................................57
11.2 Buffered Programming .......................................................................................57
11.3 Buffered Enhanced Factory Programming ..............................................................58
11.3.1 BEFP Requirements and Considerations .....................................................58
11.3.2 BEFP Setup Phase ...................................................................................59
11.3.3 BEFP Program/Verify Phase ......................................................................59
11.3.4 BEFP Exit Phase......................................................................................60
11.4 Program Suspend ..............................................................................................60
11.5 Program Resume ...............................................................................................60
11.6 Program Protection ............................................................................................61
12.0 Erase Operations......................................................................................................62
12.1 Block Erase .......................................................................................................62
12.2 Erase Suspend ..................................................................................................62
12.3 Erase Resume ...................................................................................................63
12.4 Erase Protection ................................................................................................63
13.0 Security Modes
........................................................................................................64
13.1 Block Locking ....................................................................................................64
13.1.1 Lock Block .............................................................................................64
13.1.2 Unlock Block ..........................................................................................64
13.1.3 Lock-Down Block ....................................................................................64
13.1.4 Block Lock Status ...................................................................................65
13.1.5 Block Locking During Suspend ..................................................................65
13.2 Selectable One-Time Programmable Blocks ...........................................................66
13.3 Protection Registers ...........................................................................................66
13.3.1 Reading the Protection Registers...............................................................67
13.3.2 Programming the Protection Registers .......................................................68
13.3.3 Locking the Protection Registers ...............................................................68
14.0 Special Read States..................................................................................................69
14.1 Read Status Register..........................................................................................69
14.1.1 Clear Status Register ..............................................................................70
14.2 Read Device Identifier ........................................................................................70
14.3 CFI Query .........................................................................................................71
A
B
C
D
E
F
Write State Machine.................................................................................................72
Flowcharts
...............................................................................................................79
Common Flash Interface
..........................................................................................87
Additional Information.............................................................................................97
Ordering Information for Discrete Products
.............................................................98
Ordering Information for SCSP Products
..................................................................99
Datasheet
4
November 2007
Order Number: 306666-11
P30
Revision History
Revision Date
April 2005
Revision
-001
Initial Release
Revised discrete memory maps in
Section 4.4, “Memory Maps” on page 22
Added memory maps for 512-Mbit top parameter devices in
Section 4.4, “Memory
Maps” on page 22
Description
August 2005
-002
Fixed size of Programming Region for 256-Mbit to be 8-Mbit in
Section 4.4, “Memory
Maps” on page 22
and
Section 11.0, “Programming Operations” on page 56
Removed power supply sequencing requirement in
Section 8.1, “Power-Up and Power-
Down” on page 41
Updated conditions for
Table 15, “Capacitance” on page 29
Updated CFI table in
Appendix C, “Common Flash Interface”
Added note to
Table 34, “Device ID codes” on page 71
for stacked Device ID codes
Synchronous burst read operation is currently not supported for the TSOP package
Updated 512-Mbit Easy BGA Ball Height (symbol A1) in
Figure 2, “Easy BGA Mechanical
Specifications” on page 11
September 2005
-003
November 2005
February 2006
-004
-005
Updated read access speed for 265M TSOP package
Removed all references to 1 Gigabit.
•
•
•
•
•
•
•
•
Added 52 MHz capabilities,
Added TSOP Package information for 512 Mb throughout the document,
Added
Section 2.1, “Virtual Chip Enable Description” on page 8
,
Modified figures in
Section 4.3, “Dual-Die Configurations” on page 21
,
Modified
Table 9, “512-Mbit Top and Bottom Parameter Memory Map (Easy BGA and
QUAD+ SCSP)” on page 23
,
Modified Notes 5 & 6 to Reset Specifications table in
Section 8.2, “Reset
Specifications” on page 41
,
Added additional note on 512 Mb capability in
Table 31, “Selectable OTP Block
Mapping” on page 66
.
Updated the following tables to 52 MHz:
Table 16, “AC Read Specifications for 64/
128- Mbit Densities” on page 29
and
Table 17, “AC Read Specifications for 256/512-Mbit
Densities” on page 30
.
Added notes 1, 2, and 3 to
Table 15, “Capacitance” on page 29
.
Correct typos and add clarifications
Enabled specific burst operation on TSOP packages.
Updated device commands table.
Updaed description on synchronous burst operation.
Added EOWL description.
Updated flowcharts
Updated for 65nm lithography
Added W602 - Erase to Suspend
Applied Numonyx branding.
April 2006
-006
May 2006
May-2006
-007
-008
•
•
•
•
•
•
•
•
•
•
June - 2007
-009
November 2007
November 2007
-010
11
November 2007
Order Number: 306666-11
Datasheet
5
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