M
Features
TCM811/TCM812
General Description
The TCM811 and TCM812 are cost effective system
supervisory circuits designed to monitor V
DD
in digital
systems and provide a reset signal to the host control-
ler when necessary. A manual reset input is provided
to override the reset monitor and is suitable for use as
a push-button reset. No external components are
required.
The reset output is driven active within 20 µsec (5 µsec
for F version) of V
DD
falling through the reset voltage
threshold. RESET is maintained active for a minimum
of 140 msec after V
DD
rises above the reset threshold.
The TCM812 has an active high RESET output while
the TCM811 has an active low RESET output. The out-
put of the TCM811 is valid down to V
DD
= 1V. Both
devices are available in a 4-Pin SOT-143 package,
specified with a temperature range of -40°C to +85°C.
The TCM811/TCM812 are optimized to reject fast tran-
sient glitches on the V
DD
line. A low supply current of
6 µA (V
DD
= 3.3V) makes these devices ideal for battery
powered applications.
4-Pin Microcontroller Reset Monitors
• Precision V
DD
Monitor for 2.0V, 2.8V, 3.0V, 3.3V,
5.0V Nominal Supplies
• Manual Reset Input
• 140 msec Minimum RESET Output Duration
• RESET Output Valid to V
DD
= 1.0V (TCM811)
• Low 6 µA (typ.) Supply Current
• V
DD
Transient Immunity
• Small 4-Pin SOT-143 Package
• No External Components
• Replacement for MAX811/812 and Offers a Lower
Threshold Voltage Option
• Push-Pull RESET Output
• Temperature Range:
- Commercial (C) -40°C to +85°C
Applications
•
•
•
•
Computers
Embedded Systems
Battery Powered Equipment
Critical Microcontroller Power Supply Monitoring
Package Types:
SOT-143
GND 1
TCM811
or
TCM812
4
V
DD
Typical Application Circuit
V
DD
0.1µF
4
V
DD
PIC
Microcontroller
2
RESET
INPUT
(Active Low)
GND
V
DD
TCM811
3
MR
PUSH
BUTTON
RESET
GND
TCM811
RESET
TCM812
(RESET)
2
3
MR
2002 Microchip Technology Inc.
DS21615B-page 1
TCM811/TCM812
1.0
ELECTRICAL
CHARACTERISTICS
PIN FUNCTION TABLE
NAME
GND
RESET (TCM811)
Ground
RESET push-pull output remains low
while
V
DD
is below the reset voltage
threshold, and for at least 140 msec
(min.) after
V
DD
rises above reset
threshold.
RESET push-pull output remains
high while
V
DD
is below the reset
voltage threshold, and for at least
140 msec (min.) after
V
DD
rises
above reset threshold.
Manual Reset input generates a
reset when MR is below V
IL.
Supply Voltage
FUNCTION
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (
V
DD
to GND).........................................+6.0V
RESET, RESET.................................... - 0.3V to (
V
DD
+ 0.3V)
Input Current,
V
DD
.........................................................20 mA
Output Current, RESET, RESET...................................20 mA
Operating Temperature Range...................... – 40°C to +85°C
Storage Temperature Range....................... – 65°C to +150°C
Maximum Junction Temperature, T
S
.............................. 150°C
*Notice:
Stresses beyond those listed under “Absolute Maximun Rat-
ings” may cause permanenet damage to the device. These are stress
ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximun rating con-
ditions for extended periods may affect device reliability.
RESET (TCM812)
MR
V
DD
ELECTRICAL CHARACTERISTICS
V
DD
= 5V for L/M versions, V
DD
= 3.3V for T/S versions, V
DD
= 3V for R version, V
DD
= 2.0V for F version.
T
A
= –40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C. (Note
1)
Parameters
V
DD
Range
Supply Current
Sym
V
DD
I
CC
Min
1.0
1.1
—
—
4.54
4.50
4.30
4.25
3.03
3.00
2.88
2.85
2.58
2.55
1.71
1.70
Reset Threshold Tempco
V
DD
to Reset Delay
Reset Active Timeout Period
MR Minimum Pulse Width
MR Glitch Immunity
MR to Reset Propagation
Delay
t
MD
t
RP
t
MR
—
—
—
140
10
—
—
Typ
—
—
6
4.75
4.63
—
4.38
—
3.08
—
2.93
—
2.63
—
1.75
—
30
20
5
280
—
100
0.5
Max
5.5
5.5
15
10
4.72
4.75
4.46
4.50
3.14
3.15
2.98
3.00
2.68
2.70
1.79
1.80
—
—
—
560
—
—
—
ppm/°C
µsec
msec
µsec
nsec
µsec
V
DD
= V
TH
to V
TH
–125 mV; L, M,
R, S, T, F
V
DD
= V
TH(MAX)
Units
V
µA
TCM811
TCM812
TCM81_L/M, V
DD
= 5.5V, I
OUT
= 0
TCM81_R/S/T/F, V
DD
= 3.6V, I
OUT
=0
TCM81_L:
T
A
= +25°C
T
A
= –40°C to +85°C
Conditions
Reset Threshold
V
TH
V
TCM81_M: T
A
= +25°C
T
A
= –40°C to +85°C
TCM81_T:
T
A
= +25°C
T
A
= –40°C to +85°C
TCM81_S: T
A
= +25°C
T
A
= –40°C to +85°C
TCM81_R: T
A
= +25°C
T
A
= –40°C to +85°C
TCM81_F: T
A
= +25°C
T
A
= –40°C to +85°C
Note 1:
Production testing done at T
A
= +25°C and +85°C, over temperature limits are tested with periodic QA tests
in production.
DS21615B-page 2
2002 Microchip Technology Inc.
TCM811/TCM812
V
DD
= 5V for L/M versions, V
DD
= 3.3V for T/S versions, V
DD
= 3V for R version, V
DD
= 2.0V for F version.
T
A
= –40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C. (Note
1)
Parameters
MR Input Threshold
Sym
V
IH
V
IL
V
IH
V
IL
MR Pull-up Resistance
RESET Output Voltage Low
(TCM811)
V
OL
Min
2.3
—
0.7 V
DD
—
10
—
—
—
Typ
—
—
—
—
20
—
—
—
Max
—
0.8
—
0.25 V
DD
40
0.3
0.4
0.3
Units
V
V
kΩ
V
V
V
TCM811R/S/T only;
I
SINK
= 1.2 mA, V
DD
= V
TH
(
MIN
)
TCM811F only;
I
SINK
= 500 µA, V
DD
= V
TH
(
MIN
)
TCM811L/M only;
I
SINK
= 3.2 mA, V
DD
= V
TH
(
MIN
)
I
SINK
= 3.2 mA, V
DD
= V
TH
(
MIN
)
TCM811R/S/T/F only;
I
SOURCE
= 500 µA, V
DD
> V
TH
(
MAX
)
TCM811L/M only;
I
SOURCE
= 800 µA, V
DD
> V
TH
(
MAX
)
TCM812F only, I
SINK
= 500 µA,
V
DD
= V
TH(MAX)
TCM812R/S/T only, I
SINK
= 1.2 mA,
V
DD
= V
TH(MAX)
TCM812L/M only, I
SINK
= 1.2 mA,
V
DD
= V
TH(MAX)
V
I
SOURCE
= 150 µA, V
DD
≤
V
TH(MIN)
Conditions
V
DD
> V
TH(MAX),
TCM81_L/M
V
DD
> V
TH(MAX)
,
TCM81_R/S/T/F
RESET Output Voltage High
(TCM811)
V
OH
0.8 V
DD
V
DD
- 1.5
—
—
—
—
—
—
—
—
0.2
0.3
0.4
—
V
V
V
RESET Output Voltage Low
(TCM812)
V
OL
—
—
—
RESET Output Voltage High
(TCM812)
V
OH
0.8 V
DD
Note 1:
Production testing done at T
A
= +25°C and +85°C, over temperature limits are tested with periodic QA tests
in production.
2002 Microchip Technology Inc.
DS21615B-page 3
TCM811/TCM812
2.0
APPLICATIONS INFORMATION
The TCM811/TCM812 provides accurate V
DD
monitor-
ing and reset timing during power-up, power-down, and
brownout/sag conditions. These devices also reject
negative-going transients (glitches) on the power sup-
ply line. Figure 2-1 shows the maximum transient dura-
tion vs. maximum negative excursion (overdrive) for
glitch rejection. Any combination of duration and over-
drive that is under the curve will not generate a reset
signal. Combinations above the curve are detected as
a brownout or power-down. Transient immunity can be
improved by adding a 0.1 µF capacitor in close proxim-
ity to the V
DD
pin of the TCM811/812.
(100 kΩ will be suitable for most applications). Simi-
larly, a pull-up resistor to V
DD
is required for the
TCM812 to ensure a valid high RESET for V
DD
below
1.1V.
V
DD
4
0.1µF
V
DD
TCM811
2
RESET
R
1
100 kΩ
V
DD
GND
V
TH
Overdrive =
V
D D
1
Duration
MAXIMUM TRANSIENT DURATION (µsec)
FIGURE 2-2:
The addition of R
1
at the RESET
output of the TCM811 ensures that the RESET output
is valid to V
DD
= 0V.
400
T
A
= +25˚C
2.2
Controllers and Processors With
Bidirectional I/O Pins
320
240
160
TCM81xL/M
80
TCM81xR/S/T
0
1
10
1000
100
RESET COMPARATOR OVERDRIVE,
VTH - VDD (mV)
Some microcontrollers have bi-directional reset pins.
Depending on the current drive capability of the control-
ler pin, an indeterminate logic level may result if there
is a logic conflict. This can be avoided by adding a
4.7 kΩ resistor in series with the output of the TCM811/
TCM812 (Figure 2-3). If there are other components in
the system which require a reset signal, they should be
buffered so as not to load the reset line. If the other
components are required to follow the reset I/O of the
microcontroller, the buffer should be connected as
shown with the solid line.
Buffered RESET
To Other System
Components
BUFFER
V
DD
4
0.1µF
TCM811
4.7 kΩ
RESET
GND
1
2
RESET
GND
Micro
controller
FIGURE 2-1:
Maximum Transient Duration
Overdrive for Glitch Rejection at 25°C.
vs.
2.1
RESET Signal Integrity During Power-
Down
The TCM811 RESET push-pull output is valid to V
DD
=
1.0V. Below this voltage the output becomes an "open
circuit" and does not sink current. This means CMOS
logic inputs to the microcontroller will be floating at an
undetermined voltage. Most digital systems are com-
pletely shutdown well above this voltage. However, in
situations where RESET must be maintained valid to
V
DD
= 0V, a pull-down resistor must be connected from
RESET to ground to discharge stray capacitances and
hold the output low (Figure 2-2). This resistor value,
though not critical, should be chosen such that it does
not appreciably load RESET under normal operation
FIGURE 2-3:
Interfacing the TCM811 to a Bi-
directional Reset I/O.
DS21615B-page 4
2002 Microchip Technology Inc.
TCM811/TCM812
3.0
Note:
TYPICAL PERFORMANCE CHARACTERISTICS
The graphs provided following this note are a statistical summary based on a limited number of samples
and are provided for informational purposes only. The performance characteristics listed herein are not
tested or guaranteed. In some graphs, the data presented may be outside the specified operating range
(e.g., outside specified power supply range) and therefore outside the warranted range.
8
TCM81xR/S/T/F
No Load
SUPPLY CURRENT (µA)
6
V
DD
= 5V
4
14
12
SUPPLY CURRENT (µA)
10
8
6
4
V
DD
= 1V
2
0
–40
V
DD
= 5V
V
DD
= 3V
TCM81xL/M
No Load
V
DD
= 3V
V
DD
= 1V
2
–20
0
20
40
60
85
0
–40
–20
0
20
40
60
85
TEMPERATURE (˚C)
TEMPERATURE (˚C)
FIGURE 3-1:
50
POWER-DOWN RESET DELAY (µsec)
Supply Current vs. Temperature.
FIGURE 3-4:
50
Supply Current vs. Temperature.
TCM81xF
40
30
V
OD
= 20 mV
20
POWER-DOWN RESET DELAY (µsec)
V
OD
= 20 mV
40
V
OD
= 100 mV
V
OD
= 200 mV
30
20
10
V
OD
= 100 mV
0
–40
V
OD
= 200 mV
–20
0
20
40
60
85
10
TCM81xL/M
0
–40
–20
0
20
40
60
85
TEMPERATURE (˚C)
TEMPERATURE (˚C)
FIGURE 3-2:
Temperature.
250
POWER-UP RESET TIMEOUT (msec)
Power-Down
Reset
Delay
vs.
FIGURE 3-5:
Temperature.
50
POWER-DOWN RESET DELAY (µsec)
Power-Down
Reset
Delay
vs.
TCM81x/R/S/T
245
TCM81xL/M
240
TCM81xR/S/T/F
40
30
235
20
V
OD
= 200 mV
V
OD
= 100 mV
V
OD
= 20 mV
230
10
225
–40
–20
0
20
40
60
85
0
–40
–20
0
20
40
60
85
TEMPERATURE (˚C)
TEMPERATURE (˚C)
FIGURE 3-3:
Temperature.
Power-Up
Reset
Timeout
vs.
FIGURE 3-6:
Temperature.
Power-Down
Reset
Delay
vs.
2002 Microchip Technology Inc.
DS21615B-page 5
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