FEMTOCLOCK
®
CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8430252I-45
G
ENERAL
D
ESCRIPTION
The ICS8430252I-45 is a 2 output LVPECL and LVCMOS/LVTTL
Synthesizer optimized to generate Ethernet reference clock
frequencies. Using a 25MHz, 18pF parallel resonant crystal,
the following fre-quencies can be generated: 156.25MHz
LVPECL output and, 125MHz LVCMOS output. The 8430252I-
45 uses IDT’s 3
RD
generation low phase noise VCO technology
and can achieve 1ps or lower typical rms phase jitter, easily
meeting Ethernet jitter requirements. The ICS8430252I-45 is
packaged in a small 16-pin TSSOP package.
F
EATURES
• One differential 3.3V LVPECL output and
One LVCMOS/LVTTL output
• Crystal oscillator interface designed for a 25MHz,
18pF parallel resonant crystal
• A 25MHz crystal generates both an output frequency of
156.25MHz (LVPECL) and 125MHz (LVCMOS)
• VCO frequency: 625MHz
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz) using
a 25MHz crystal: 0.39ps (typical)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
B
LOCK
D
IAGRAM
OE
Pullup
P
IN
A
SSIGNMENT
OE
V
EE
QA
V
CCO
_
A
nc
nc
V
CCA
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLK_EN
V
EE
QB
nQB
V
CCO
_
B
XTAL_IN
XTAL_OUT
V
EE
XTAL_IN
XTAL_OUT
25MHz
÷5
QA
OSC
Phase
Detector
VCO
625MHz
QB
÷4
Feedback Divider
÷25
nQB
CLK_EN
Pullup
ICS8430252I-45
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
IDT
™
/ ICS
™
3.3V LVEPCL FREQUENCY SYNTHESIZER
1
ICS8430252CGI-45 REVISION A NOVEMBER 3, 2010
ICS8430252I-45
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2, 9, 15
3
4
5, 6
7
8
10, 11
12
13, 14
Name
OE
V
EE
QA
V
CCO_A
nc
V
CCA
V
CC
XTAL_OUT,
XTAL_IN
V
CCO_B
nQB, QB
Input
Power
Output
Power
Unused
Power
Power
Input
Power
Output
Type
Pullup
Description
Output enable pin. LVCMOS/LVTTL interface levels.
See Table 3A Function Table.
Negative supply pins.
LVCMOS/LVTTL clock output.
Output supply pin for QA output.
No connect.
Analog supply pin.
Core supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Output supply pin for QB, nQB outputs.
Differential clock outputs. LVPECL interface levels.
Clock enable pin. LVCMOS/LVTTL interface levels.
16
CLK_EN
Input
Pullup
See Table 3B Function Table.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characterisitcs, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol Parameter
C
IN
C
PD
R
PULLUP
R
OUT
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Output Impedance
QA
V
CCO_A
= 3.3V
V
CC
, V
CCA
, V
CCO_A,
V
CCO_B
= 3.465V
Test Conditions
Minimum
Typical
4
18
51
20
Maximum
Units
pF
pF
kΩ
Ω
T
ABLE
3A. OE S
ELECT
F
UNCTION
T
ABLE
Input
OE
0
1
Output
QA
Hi-Z
Active
T
ABLE
3B. CLK_EN S
ELECT
F
UNCTION
T
ABLE
Input
CLK_EN
0
1
QB
Low
Active
Outputs
nQB
High
Active
IDT
™
/ ICS
™
3.3V LVEPCL FREQUENCY SYNTHESIZER
2
ICS8430252CGI-45 REVISION A NOVEMBER 3, 2010
ICS8430252I-45
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
89°C/W (0 lfpm)
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_A,
V
CCO_B
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
V
CCO_A,
V
CCO_B
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.10
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
CC
3.465
95
10
Units
V
V
V
mA
mA
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_A
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE, CLK_EN
OE, CLK_EN
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
-150
2.6
0.5
V
V
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
5
Units
V
V
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
V
OL
NOTE 1: Outputs terminated with 50
Ω
to V
CCO_A
/2. See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
T
ABLE
4C. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_B
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO_B
- 1.4
V
CCO_B
- 2.0
0.6
Typical
Maximum
V
CCO_B
- 0.9
V
CCO_B
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CCO_B
- 2V.
IDT
™
/ ICS
™
3.3V LVEPCL FREQUENCY SYNTHESIZER
3
ICS8430252CGI-45 REVISION A NOVEMBER 3, 2010
ICS8430252I-45
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pF parallel resonant crystal.
Test Conditions
Minimum
Typical
Fundamental
25
50
7
1
MH z
Ω
pF
mW
Maximum
Units
T
ABLE
6. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_A,
V
CCO_B
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency Range
RMS Phase Jitter
(Random); NOTE 1
Output
Rise/Fall Time
Output Duty Cycle
QA
QB, nQB
QA
QB, nQB
125MHz (1.875MHz - 20MHz)
156.25MHz (1.875MHz - 20MHz)
20% to 80%
500
300
Test Conditions
Minimum
Typical
156.25
125
0.41
0.39
1200
700
Maximum
Units
MHz
MHz
ps
ps
ps
ps
t
jit(Ø)
t
R
/ t
F
odc
QA
47
53
%
QB, nQB
48
52
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established
when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet
specifications after thermal equilibrium has been reached under these conditions.
NOTE 1: Please refer to the Phase Noise Plots.
IDT
™
/ ICS
™
3.3V LVEPCL FREQUENCY SYNTHESIZER
4
ICS8430252CGI-45 REVISION A NOVEMBER 3, 2010
ICS8430252I-45
FEMTOCLOCK
®
CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
T
YPICAL
P
HASE
N
OISE AT
156.25MH
Z
-10
-20
-30
-40
-50
-60
-70
➤
10Gb Ethernet Filter
156.25MHz
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.39ps (typical)
0
N
OISE
P
OWER
dBc
Hz
-80
-90
-100
-110
Raw Phase Noise Data
➤
-120
-130
-140
-160
-170
-180
-190
1k
10k
➤
Phase Noise Result by adding
10Gb Ethernet Filterto raw data
100k
1M
10M
100M
-150
O
FFSET
F
REQUENCY
(H
Z
)
T
YPICAL
P
HASE
N
OISE AT
125MH
Z
-10
-20
-30
-40
-50
-60
-70
➤
10Gb Ethernet Filter
125MHz
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.41ps (typical)
0
N
OISE
P
OWER
dBc
Hz
-80
-90
-100
-110
-120
-130
-140
-160
-170
-180
-190
1k
10k
100k
-150
Raw Phase Noise Data
➤
Phase Noise Result by adding
10Gb Ethernet Filterto raw data
1M
10M
100M
IDT
™
/ ICS
™
3.3V LVEPCL FREQUENCY SYNTHESIZER
➤
O
FFSET
F
REQUENCY
(H
Z
)
5
ICS8430252CGI-45 REVISION A NOVEMBER 3, 2010
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