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74AVCH1T45
Dual-supply voltage level translator/transceiver; 3-state
Rev. 5 — 6 January 2016
Product data sheet
1. General description
The 74AVCH1T45 is a single bit, dual supply transceiver that enables bidirectional level
translation. It features two 1-bit input-output ports (A and B), a direction control input (DIR)
and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied at any
voltage between 0.8 V and 3.6 V making the device suitable for translating between any of
the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A and DIR are
referenced to V
CC(A)
and pin B is referenced to V
CC(B)
. A HIGH on DIR allows
transmission from A to B and a LOW on DIR allows transmission from B to A.
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at
GND level, both A and B are in the high-impedance OFF-state.
The 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or
floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
2. Features and benefits
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
500 Mbit/s (1.8 V to 3.3 V translation)
320 Mbit/s (< 1.8 V to 3.3 V translation)
320 Mbit/s (translate to 2.5 V or 1.8 V)
280 Mbit/s (translate to 1.5 V)
NXP Semiconductors
74AVCH1T45
Dual-supply voltage level translator/transceiver; 3-state
240 Mbit/s (translate to 1.2 V)
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AVCH1T45GW
74AVCH1T45GM
74AVCH1T45GN
74AVCH1T45GS
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
XSON6
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
SOT1115
SOT1202
4. Marking
Table 2.
Marking
Marking code
[1]
K5
K5
K5
K5
Type number
74AVCH1T45GW
74AVCH1T45GM
74AVCH1T45GN
74AVCH1T45GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74AVCH1T45
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 6 January 2016
2 of 24
NXP Semiconductors
74AVCH1T45
Dual-supply voltage level translator/transceiver; 3-state
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
Logic diagram
6. Pinning information
6.1 Pinning
74AVCH1T45
74AVCH1T45
V
CC(A)
GND
1
2
6
5
V
CC(B)
DIR
A
A
3
001aag887
74AVCH1T45
V
CC(B)
V
CC(A)
1
6
V
CC(B)
V
CC(A)
1
6
GND
2
5
DIR
GND
2
5
DIR
3
4
B
A
3
4
B
aaa-000877
4
B
001aag888
Transparent top view
Transparent top view
Fig 3.
Pin configuration SOT363
Fig 4.
Pin configuration SOT886
Fig 5.
Pin configuration SOT1115
and SOT1202
6.2 Pin description
Table 3.
Symbol
V
CC(A)
GND
A
B
DIR
V
CC(B)
Pin description
Pin
1
2
3
4
5
6
Description
supply voltage port A and DIR
ground (0 V)
data input or output
data input or output
direction control
supply voltage port B
74AVCH1T45
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 6 January 2016
3 of 24
NXP Semiconductors
74AVCH1T45
Dual-supply voltage level translator/transceiver; 3-state
7. Functional description
Table 4.
Function table
[1]
Input
DIR
[3]
L
H
X
Input/output
[2]
A
A=B
input
Z
B
input
B=A
Z
Supply voltage
V
CC(A)
, V
CC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
GND
[4]
[1]
[2]
[3]
[4]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
The input circuit of the data I/O is always active.
The DIR input circuit is referenced to V
CC(A)
.
If at least one of V
CC(A)
or V
CC(B)
is at GND level, the device goes into Suspend mode.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC(A)
V
CC(B)
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Parameter
supply voltage A
supply voltage B
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+4.6
+4.6
-
+4.6
-
+4.6
50
100
-
+150
250
Unit
V
V
mA
V
mA
V
mA
mA
mA
C
mW
V
I
< 0 V
[1]
50
0.5
50
[1][2][3]
[1]
V
O
< 0 V
Active mode
Suspend or 3-state mode
V
O
= 0 V to V
CCO
I
CC(A)
or I
CC(B)
0.5
0.5
-
-
100
65
V
CCO
+ 0.5 V
T
amb
=
40 C
to +125
C
[4]
-
The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
V
CCO
is the supply voltage associated with the output port.
V
CCO
+ 0.5 V should not exceed 4.6 V.
For SC-88 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V
CC(A)
V
CC(B)
V
I
74AVCH1T45
Recommended operating conditions
Parameter
supply voltage A
supply voltage B
input voltage
All information provided in this document is subject to legal disclaimers.
Conditions
Min
0.8
0.8
0
Max
3.6
3.6
3.6
Unit
V
V
V
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 5 — 6 January 2016
4 of 24
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