74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
Rev. 2 — 9 April 2013
Product data sheet
1. General description
The 74AVCH1T45-Q100 is a single bit, dual supply transceiver that enables bidirectional
level translation. It features two 1-bit input-output ports (A and B), a direction control input
(DIR) and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied
with any voltage between 0.8 V and 3.6 V making the device suitable for translating
between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A
and DIR are referenced to V
CC(A)
and pin B is referenced to V
CC(B)
. A HIGH on DIR allows
transmission from A to B and a LOW on DIR allows transmission from B to A.
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at
GND level, both A and B are in the high-impedance OFF-state.
The 74AVCH1T45-Q100 has active bus hold circuitry which is provided to hold unused or
floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 Class 3B exceeds 8000 V
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
NXP Semiconductors
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
Maximum data rates:
500 Mbit/s (1.8 V to 3.3 V translation)
320 Mbit/s (< 1.8 V to 3.3 V translation)
320 Mbit/s (translate to 2.5 V or 1.8 V)
280 Mbit/s (translate to 1.5 V)
240 Mbit/s (translate to 1.2 V)
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AVCH1T45GW-Q100
40 C
to +125
C
SC-88
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
4. Marking
Table 2.
Marking
Marking code
[1]
K5
Type number
74AVCH1T45GW-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
DIR
5
DIR
3
A
4
V
CC(A)
V
CC(B)
V
CC(A)
001aag885
A
B
B
V
CC(B)
001aag886
Fig 1.
Logic symbol
Fig 2.
Logic diagram
74AVCH1T45_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 9 April 2013
2 of 21
NXP Semiconductors
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
6. Pinning information
6.1 Pinning
$9&+74
9
*1'
$
9
',5
%
DDD
Fig 3.
Pin configuration SOT363
6.2 Pin description
Table 3.
Symbol
V
CC(A)
GND
A
B
DIR
V
CC(B)
Pin description
Pin
1
2
3
4
5
6
Description
supply voltage port A and DIR
ground (0 V)
data input or output
data input or output
direction control
supply voltage port B
7. Functional description
Table 4.
Function table
[1]
Input
DIR
[3]
L
H
X
Input/output
[2]
A
A=B
input
Z
B
input
B=A
Z
Supply voltage
V
CC(A)
, V
CC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
GND
[4]
[1]
[2]
[3]
[4]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
The input circuit of the data I/O is always active.
The DIR input circuit is referenced to V
CC(A)
.
If at least one of V
CC(A)
or V
CC(B)
is at GND level, the device goes into Suspend mode.
74AVCH1T45_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 9 April 2013
3 of 21
NXP Semiconductors
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC(A)
V
CC(B)
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Parameter
supply voltage A
supply voltage B
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+4.6
+4.6
-
+4.6
-
V
CCO
+ 0.5
+4.6
50
100
-
+150
250
Unit
V
V
mA
V
mA
V
V
mA
mA
mA
C
mW
V
I
< 0 V
[1]
50
0.5
50
[1][2][3]
[1]
V
O
< 0 V
Active mode
Suspend or 3-state mode
V
O
= 0 V to V
CCO
I
CC(A)
or I
CC(B)
0.5
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[4]
-
The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
V
CCO
is the supply voltage associated with the output port.
V
CCO
+ 0.5 V should not exceed 4.6 V.
For SC-88 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
74AVCH1T45_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 9 April 2013
4 of 21
NXP Semiconductors
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
9. Recommended operating conditions
Table 6.
Symbol
V
CC(A)
V
CC(B)
V
I
V
O
T
amb
t/V
[1]
[2]
Recommended operating conditions
Parameter
supply voltage A
supply voltage B
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CCI
= 0.8 V to 3.6 V
[2]
Conditions
Min
0.8
0.8
0
Max
3.6
3.6
3.6
V
CCO
3.6
+125
5
Unit
V
V
V
V
V
C
ns/V
Active mode
Suspend or 3-state mode
[1]
0
0
40
-
V
CCO
is the supply voltage associated with the output port.
V
CCI
is the supply voltage associated with the input port.
10. Static characteristics
Table 7.
Typical static characteristics at T
amb
= 25
C
[1][2]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
OH
V
OL
I
I
I
BHL
I
BHH
I
BHLO
I
BHHO
I
OZ
I
OFF
HIGH-level output voltage
LOW-level output voltage
input leakage current
bus hold LOW current
bus hold HIGH current
bus hold LOW overdrive
current
bus hold HIGH overdrive
current
OFF-state output current
power-off leakage current
Conditions
V
I
= V
IH
or V
IL
I
O
=
1.5
mA; V
CC(A)
= V
CC(B)
= 0.8 V
V
I
= V
IH
or V
IL
I
O
= 1.5 mA; V
CC(A)
= V
CC(B)
= 0.8 V
DIR input; V
I
= 0 V or 3.6 V;
V
CC(A)
= V
CC(B)
= 0.8 V to 3.6 V
V
I
= 0.42 V; V
CC(A)
= V
CC(B)
= 1.2 V
V
I
= 0.78 V; V
CC(A)
= V
CC(B)
= 1.2 V
V
I
= GND to V
CCI
; V
CC(A)
= V
CC(B)
= 1.2 V
V
I
= GND to V
CCI
; V
CC(A)
= V
CC(B)
= 1.2 V
A or B port; V
O
= 0 V or V
CCO
;
V
CC(A)
= V
CC(B)
= 0.8 V to 3.6 V
A port; V
I
or V
O
= 0 V to 3.6 V;
V
CC(A)
= 0 V; V
CC(B)
= 0.8 V to 3.6 V
B port; V
I
or V
O
= 0 V to 3.6 V;
V
CC(B)
= 0 V; V
CC(A)
= 0.8 V to 3.6 V
C
I
input capacitance
DIR input; V
I
= 0 V or 3.3 V;
V
CC(A)
= V
CC(B)
= 3.3 V
[3]
[4]
[5]
Min
-
-
-
-
-
-
-
-
-
-
-
Typ
0.69
0.07
Max
-
-
Unit
V
V
0.025 0.25 A
26
24
28
26
0.5
0.1
0.1
1.0
-
-
-
-
2.5
1
1
-
A
A
A
A
A
A
A
pF
[6]
[7]
74AVCH1T45_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 9 April 2013
5 of 21
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