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74AVC4T245PW,112

产品描述Voltage Level Translator 4-CH Bidirectional 16-Pin TSSOP Bulk
文件大小360KB,共27页
制造商Nexperia
官网地址https://www.nexperia.com
标准
相似器件已查找到20个与74AVC4T245PW,112功能相似器件
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74AVC4T245PW,112概述

Voltage Level Translator 4-CH Bidirectional 16-Pin TSSOP Bulk

74AVC4T245PW,112规格参数

参数名称属性值
欧盟限制某些有害物质的使用Compliant
ECCN (US)EAR99
Part StatusLTB
HTS8542.39.00.01
Logic FamilyAVC
Logic FunctionVoltage Level Translator
Channel TypeBidirectional
Number of Channels4
Maximum Propagation Delay Time @ Maximum CL (ns)14.5(Typ)@0.8V
Absolute Propagation Delay Time (ns)14.7
Minimum High Level Input Voltage (V)1.6
Process TechnologyCMOS
Minimum Latch-Up Current (mA)100
输出类型
Output Type
3-State
Maximum Low Level Output Current (mA)12
Maximum High Level Output Current (mA)-12
Minimum Operating Supply Voltage (V)0.8
Typical Operating Supply Voltage (V)1.8|2.5|3.3
Maximum Operating Supply Voltage (V)3.6
Maximum Quiescent Current (mA)0.07
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)125
系列
Packaging
Bulk
Supplier PackageTSSOP
Pin Count16
MountingSurface Mount
Package Height0.95(Max)
Package Length5.1(Max)
Package Width4.5(Max)
PCB changed16

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74AVC4T245
Rev. 7 — 29 April 2021
4-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Product data sheet
1. General description
The 74AVC4T245 is an 4-bit, dual supply transceiver that enables bidirectional level translation.
The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features four 2-bit
input-output ports (nAn and nBn), a direction control input (nDIR), a output enable input (nOE)
and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied at any voltage
between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage
nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and nDIR are referenced to
V
CC(A)
and pins nBn are referenced to V
CC(B)
. A HIGH on nDIR allows transmission from nAn to
nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can
be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at GND level, both nAn and nBn
are in the high-impedance OFF-state.
2. Features and benefits
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C

74AVC4T245PW,112相似产品对比

74AVC4T245PW,112 74AVC4T245BQ,115 74AVC4T245PW,118
描述 Voltage Level Translator 4-CH Bidirectional 16-Pin TSSOP Bulk Voltage Level Translator 4-CH Bidirectional 16-Pin DHVQFN EP T/R Voltage Level Translator 4-CH Bidirectional 16-Pin TSSOP T/R
欧盟限制某些有害物质的使用 Compliant Compliant Compliant
ECCN (US) EAR99 EAR99 EAR99
Part Status LTB Active Active
HTS 8542.39.00.01 8542.39.00.01 8542.39.00.01
Logic Family AVC AVC AVC
Logic Function Voltage Level Translator Voltage Level Translator Voltage Level Translator
Channel Type Bidirectional Bidirectional Bidirectional
Number of Channels 4 4 4
Maximum Propagation Delay Time @ Maximum CL (ns) 14.5(Typ)@0.8V 14.5(Typ)@0.8V 14.5(Typ)@0.8V
Absolute Propagation Delay Time (ns) 14.7 14.7 14.7
Minimum High Level Input Voltage (V) 1.6 1.6 1.6
Process Technology CMOS CMOS CMOS
Minimum Latch-Up Current (mA) 100 100 100
输出类型
Output Type
3-State 3-State 3-State
Maximum Low Level Output Current (mA) 12 12 12
Maximum High Level Output Current (mA) -12 -12 -12
Minimum Operating Supply Voltage (V) 0.8 0.8 0.8
Typical Operating Supply Voltage (V) 1.8|2.5|3.3 3.3|2.5|1.8 3.3|2.5|1.8
Maximum Operating Supply Voltage (V) 3.6 3.6 3.6
Maximum Quiescent Current (mA) 0.07 0.07 0.07
Minimum Operating Temperature (°C) -40 -40 -40
Maximum Operating Temperature (°C) 125 125 125
系列
Packaging
Bulk Tape and Reel Tape and Reel
Supplier Package TSSOP DHVQFN EP TSSOP
Pin Count 16 16 16
Mounting Surface Mount Surface Mount Surface Mount
Package Height 0.95(Max) 0.95(Max) 0.95(Max)
Package Length 5.1(Max) 3.6(Max) 5.1(Max)
Package Width 4.5(Max) 2.6(Max) 4.5(Max)
PCB changed 16 16 16

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