74HC373; 74HCT373
Rev. 7 — 22 July 2020
Octal D-type transparent latch; 3-state
Product data sheet
1. General description
The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device
features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs
enter the latches. In this condition the latches are transparent, a latch output will change each time
its corresponding D-input changes. When LE is LOW the latches store the information that was
present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE
causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not
affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
•
•
•
•
•
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
•
JESD8C (2.7 V to 3.6 V)
•
JESD7A (2.0 V to 6.0 V)
Input levels:
•
For 74HC373: CMOS level
•
For 74HCT373: TTL level
3-state non-inverting outputs for bus oriented applications
Common 3-state output enable input
ESD protection:
•
HBM JESD22-A114F exceeds 2000 V
•
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
•
•
Nexperia
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC373D
74HCT373D
74HC373DB
74HC373PW
74HCT373PW
74HC373BQ
74HCT373BQ
-40 °C to +125 °C
DHVQFN20
-40 °C to +125 °C
-40 °C to +125 °C
SSOP20
TSSOP20
-40 °C to +125 °C
SO20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5 × 4.5 × 0.85 mm
Version
SOT163-1
SOT339-1
SOT360-1
SOT764-1
4. Functional diagram
3
4
7
8
13
14
17
18
11
1
D0
D1
D2
D3
D4
D5
D6
D7
LE
OE
001aae050
LATCH
1 TO 8
3-STATE
OUTPUTS
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
Fig. 1.
Functional diagram
OE
LE
11
3
4
7
8
13
14
17
18
LE
D0
D1
D2
D3
D4
D5
D6
D7
OE
1
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
1
11
EN
C1
2
5
6
9
12
15
16
19
001aae049
D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18
1D
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
001aae048
Fig. 2.
Logic symbol
Fig. 3.
IEC logic symbol
74HC_HCT373
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 7 — 22 July 2020
2 / 17
Nexperia
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
LE
LE
LE
D
Q
LE
001aae051
Fig. 4.
Logic diagram (one latch)
D0
D1
D2
D3
D4
D5
D6
D7
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
LATCH
1
LE LE
LATCH
2
LE LE
LATCH
3
LE LE
LATCH
4
LE LE
LATCH
5
LE LE
LATCH
6
LE LE
LATCH
7
LE LE
LATCH
8
LE LE
LE
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
001aae052
Fig. 5.
Logic diagram
74HC_HCT373
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 7 — 22 July 2020
3 / 17
Nexperia
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
5. Pinning information
5.1. Pinning
74HC373
74HCT373
terminal 1
index area
Q0
2
3
4
5
6
7
8
9
GND 10
LE 11
GND
(1)
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
OE
1
74HC373
74HCT373
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
001aae046
D0
D1
Q1
Q2
D2
D3
Q3
001aae047
Transparent top view
GND 10
Fig. 6.
Pin configuration SOT163-1 (SO20),
SOT339-1 (SSOP20) and SOT360-1 (TSSOP20)
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
Fig. 7.
Pin configuration SOT764-1 (DHVQFN20)
5.2. Pin description
Table 2. Pin description
Symbol
OE
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
D0, D1, D2, D3, D4, D5, D6, D7
GND
LE
V
CC
Pin
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
Description
3-state output enable input (active LOW)
3-state latch output
data input
ground (0 V)
latch enable input (active HIGH)
supply voltage
74HC_HCT373
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 7 — 22 July 2020
4 / 17
Nexperia
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
6. Functional description
Table 3. Functional description
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level; I = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
X = don’t care; Z = high-impedance OFF-state.
Operating mode
Enable and read register
(transparent mode)
Latch and read register
Latch register and disable
outputs
Control
OE
L
L
H
LE
H
L
X
Input
Dn
L
H
l
h
X
L
H
L
H
X
Internal latches
Output
Qn
L
H
L
H
Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
Conditions
V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V
V
O
< -0.5 V or V
O
> V
CC
+ 0.5 V
V
O
= -0.5 V to (V
CC
+ 0.5 V)
Min
-0.5
-
-
-
-
-
-65
[1]
-
Max
+7
±20
±20
±35
+70
-70
+150
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
For SOT163-1 (SO20) package: P
tot
derates linearly with 12.3 mW/K above 109 °C.
For SOT339-1 (SSOP20) package: P
tot
derates linearly with 10.0 mW/K above 100 °C.
For SOT360-1 (TSSOP20) package: P
tot
derates linearly with 10.0 mW/K above 100 °C.
For SOT764-1 (DHVQFN20) package: P
tot
derates linearly with 12.9 mW/K above 111 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
Δt/ΔV
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
Min
2.0
0
0
-40
-
-
-
74HC373
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
Min
4.5
0
0
-40
-
-
-
74HCT373
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
°C
ns/V
ns/V
ns/V
Unit
74HC_HCT373
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 7 — 22 July 2020
5 / 17
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
