TB67S158FTG
TOSHIBA Bi-CD Process Integrated Circuit Silicon Monolithic
TB67S158FTG
1. Summary/Features/Appearance
Constant voltage control DMOS driver incorporating 2 function modes (full parallel input and
serial input).
Summary
The TB67S158 is a constant voltage control DMOS driver. It can operate
maximum of two unipolar stepping motors (max).
Mode1: Full parallel input (similar to transistor array)
Mode2: Serial input
Output voltage of 80V and maximum current of 1.5A are realized by
applying BiCD process. Motor can be driven by single power supply of VM
with the internal regulator.
FTG
P-WQFN48-0707-0.50-003
Weight: 1.1g (typ.)
Features
・Capable
of operating maximum of two 2-phase unipolar stepping motors by one chip.
・High
voltage and current (as for specifications, please refer to the absolute maximum ratings and operation
ranges).
・Low
on resistance (Ron=0.5Ω (typ.)) of output step is realized by BiCD process.
・Built-in
VCC regulator for internal circuit control (capable of operating by only VM power supply)
・Capable
of constant voltage driving (corresponding to 2-phase and 1-2-phase excitation drives)
・Built-in
thermal shutdown circuit (TSD), over current detection (ISD), and power on reset of VM power
supply
・ALERT
signal can be outputted to outside when thermal shutdown circuit (TSD) or over current detection
(ISD) operates
Note) Please be careful about the thermal conditions during use.
© 2014-2020
Toshiba Electronic Devices & Storage Corporation
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TB67S158FTG
2. Block diagram: Mode1 (Full parallel mode)
IN_A1
IN_A2
Polarity and Angle
control A
Ach
Pre
drv
Ach
OUT
Nch×2
OUT_A+
OUT_A-
VCOMAB
IN_B1
IN_B2
Polarity and Angle
control B
Bch
Pre
drv
Bch
OUT
Nch×2
OUT_B+
OUT_B-
MODE
MODE Control
Error detect
(TSD/ISD)
POR
Pre TSD
ERR
Internal OSC
VM
VCC regulator
IN_C1
IN_C2
Polarity and Angle
control C
Cch
Pre
drv
Cch
OUT
Nch×2
OUT_C+
OUT_C-
VCOMCD
IN_D1
IN_D2
Polarity and Angle
control D
Dch
Pre
drv
Dch
OUT
Nch×2
OUT_D+
OUT_D-
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3. Pin name/ assignment: Mode1 (Full parallel mode)
(Top View)
MODE
LGND
ERR
LGND
24 VCOM_AB
23 OUT_B+
22 OUT_B+
21 OUT_B-
20 OUT_B-
19 PGND_AB
TB67S158FTG
18 PGND_AB
17 OUT_A-
16 OUT_A-
15 OUT_A+
14
13
1
NC
2
IN_D1
3
IN_D2
4
IN_C1
5
IN_C2
6
IN_A1
7
NC
8
IN_A2
9 10 11 12
IN_B1
IN_B2
NC
NC
OUT_A+
NC
VM
NC
NC
NC
NC
NC
NC
36 35 34 33 32 31 30 29 28 27 26 25
VCOM_CD
OUT_D+
OUT_D+
OUT_D-
OUT_D-
PGND_CD
PGND_CD
OUT_C-
OUT_C-
OUT_C+
OUT_C+
NC
37
38
39
40
41
42
43
44
45
46
47
48
(*) Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB.
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3-1. Application Notes
1) All the grounding wires of the device must run on the solder mask on the PCB and be externally terminated at
only one point. Also, a grounding method should be considered for efficient heat dissipation.
2) When setting pin of each mode is controlled by SW, the voltage should be pull-up to the power supply which is
the same voltage of the input signal or pull-down to the GND in order to avoid Hi-Z.
3) Careful attention should be paid to the layout of the output, VM and GND traces, to avoid short circuits across
output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently
damaged.
4) Also, the utmost care should be taken for pattern designing and implementation of the device since it has power
supply pins (VM, OUT, GND, etc.) through which a particularly large current may run. If these pins are wired
incorrectly, an operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current running
through the IC that is larger than the specified current.
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3-2. Pin assignment of the TB67S158 (QFN48)
Pin No.
Full parallel(MODE=L)
Serial/Parallel(MODE=H)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
* NC pins should be set open.
NC
IN_D1
IN_D2
IN_C1
IN_C2
IN_A1
NC
IN_A2
IN_B1
IN_B2
NC
NC
NC
OUT_A+
OUT_A+
OUT_A-
OUT_A-
PGND_AB
PGND_AB
OUT_B-
OUT_B-
OUT_B+
OUT_B+
VCOM_AB
LGND
MODE
NC
NC
NC
VM
NC
NC
NC
ERR
LGND
NC
VCOM_CD
OUT_D+
OUT_D+
OUT_D-
OUT_D-
PGND_CD
PGND_CD
OUT_C-
OUT_C-
OUT_C+
OUT_C+
NC
NC
DATA
CLK
ALM
NC
CLR
NC
GATE
STBY
LATCH
NC
NC
NC
OUT_A+
OUT_A+
OUT_A-
OUT_A-
PGND_AB
PGND_AB
OUT_B-
OUT_B-
OUT_B+
OUT_B+
VCOM_AB
LGND
MODE
NC
NC
NC
VM
NC
NC
NC
ERR
LGND
NC
VCOM_CD
OUT_D+
OUT_D+
OUT_D-
OUT_D-
PGND_CD
PGND_CD
OUT_C-
OUT_C-
OUT_C+
OUT_C+
NC
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