NCP2830
1W Constant Filterless
Class-D Audio Amplifier
NCP2830 is a cost effective mono audio power amplifier designed
for portable communication device applications such as mobile
phones. Due to its integrated charge pump structure, this part is
capable of delivering 1 W of continuous average power to an 8.0
W
Bridge Tied Load no matter the voltage provided by a lithium/Ion
battery.
NCP2830 is a preferred solution for long playback audio with
minimum space required.
Added to a fast start−up time of 200
ms
and a
−88dB
PSRR, the
NCP2830 audio power amplifier is specifically designed to provide
high quality and level output power from low supply voltage,
requiring very few external components.
Features
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MARKING
DIAGRAM
20
1
UQFN20
MU SUFFIX
CASE 523AL
XXXX
ALYWG
G
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1 W to 8
W
load for V
DD
from 2.7 V up to 5.5 V
High quality audio (THD+N = 0.04%)
Low noise: SNR up to 100 dB
Very Fast Turn On Time: 200
ms
Overall system efficiency optimization: up to 89%
Superior PSRR (−88 dB): Direct Connection to Battery
Very Low Quiescent Current 7 mA
Optimized PWM Output Stage: Filterless Capability
Selectable gain of 2 V/V or 4 V/V
Fully Differential Capability:
Thin QFN 3x3 mm, 20 pins
This Device uses Halogen−Free Molding Compound
This is a Pb−Free Device
Cellular Phones and Digital Cameras
Personal Digital Assistant and Portable Media Player
Audio Accessories
GPS
2.2
mF,
C3
6.3 V
C1P
C1
4.7
mF
6.3 V
C2
4.7
mF
6.3 V
PVDD
AVDD
C4
C1N C2P
2.2
mF,
6.3 V
C2N
VB_OUT
VB_IN
C6
10
mF,
6.3 V
C5
10
mF,
6.3 V
XXXX
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PGND_D
17
20
INP 1
INM 2
AGND 3
AVDD 4
WM 5
6
SD
19
18
OUTM
16
15 VB_OUT
14 C1P
13 C2P
12 PVDD
11 RES1
10
C1N
VB_IN
Typical Applications
7
GS
OUTP
8
C2N
RES2
9
PGND_CP
Battery
+
−
Digital Control
WM
GS
SD
1
mF
C7
C8
(TOP VIEW)
20−Pin 3 x 3 x 0.50 mm QFN
Exposed pad must be soldered to
PCB Ground Plane
NCP2830
INM
INP
PGND_D PGND_CP
AGND
RES1
RES2
OUTM
OUTP
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
Audio Inputs
1
mF
Figure 1. Typical Application Circuit
©
Semiconductor Components Industries, LLC, 2009
August, 2009
−
Rev. 0
1
Publication Order Number:
NCP2830/D
NCP2830
2.2
mF,
6.3 V
2.2
mF,
6.3 V
PVDD
Lithium/
Ion
Battery
AVDD
C1P
C1N
C2P
C2N
VB_IN
VB_OUT
Charge Pump
Stepup
2 x 4.7
mF,
0603
2x10
mF,
6.3 V
0603
I/O from Microcontroller
WM
I/O from Microcontroller
GS
Shutdown
and Biasing
SD
I/O from Microcontroller
INM
1
mF
Filterless
Class D Audio
Amplifier
INP
1
mF
AGND
PGND_D
RES1
PGND_CP
RES2
OUTM
OUTP
Figure 2. Simplified Block Diagram
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2
NCP2830
PIN FUNCTION DESCRIPTION
Pin
20
3
9
17
4, 12
Pin Name
VB_IN
AGND
PGND_C
P
PGND_D
AVDD
PVDD
Type
I
P
P
P
P
Description
This pin must be externally connection in a star configuration with Pin n°15. The C
out
filtering
(10
mF/6.3
V/0603) capacitor must be connected as close as possible to the connection point.
Ground. These pins must be connected separately to the dedicated Ground plane with a minimum of
track length. Thus, a star connection is required.
Ground. These pins must be connected separately to the dedicated Ground plane with a minimum of
track length. Thus, a star connection is required.
Ground. These pins must be connected separately to the dedicated Ground plane with a minimum of
track length. Thus, a star connection is required.
T
hese pins are dedicated to the signal connection for the battery input. They must be connected to the
power source (ie lithium/Ion battery) in a star mode. It must be decoupled by a low ESR ceramic
capacitor. (4.7
m
F/6.3 V/0603). The use of a 4 or more layers board is advised. In that case, a dedicated
plane for this battery voltage is mandatory.
Positive audio input of the fully differential filterless Class D Audio Amplifier
Negative audio input of the fully differential filterless Class D Audio Amplifier
Negative audio output of the fully differential filterless Class D Audio Amplifier
Positive audio output of the fully differential filterless Class D Audio Amplifier
Wire Mode pin: When a low level is applied to this pin, the device operates in Normal mode (V
B
= 5 V
typ.). In case of a high level, it switches to a Wire Mode (V
B
= V
DD
)
Shutdown input. The device enters in shutdown mode when a low level is applied on this pin.
Gain Select Input. When a low level is applied to this pin, an internal 2 V/V gain is setup. In case of a
high level, it switches to an internal 4 V/V gain.
One side of the external charge pump capacitor is connected to this pin, associated with C2P. Using a
low ESR ceramic capacitor is recommended to optimize charge pump efficiency (2.2
m
F/6.3 V/0603
recommended).
One side of the external charge pump capacitor is connected to this pin, associated with C1P. Using a
low ESR ceramic capacitor is recommended to optimize charge pump efficiency (2.2
m
F/6.3V/0603
recommended).
One side of the external charge pump capacitor is connected to this pin, associated with C2N. Using a
low ESR ceramic capacitor is recommended to optimize charge pump efficiency (2.2
m
F/6.3 V/0603
recommended).
One side of the external charge pump capacitor is connected to this pin, associated with C1N. Using a
low ESR ceramic capacitor is recommended to optimize charge pump efficiency (2.2
m
F/6.3 V/0603
recommended).
This pin must be externally connection in a star configuration with Pin n°20. The C
out
filtering
(10
m
F/6.3 V/0603) capacitor must be connected as close as possible to the connection point. This V
B
input is dedicated to supply the internal power stages. Thus, it must be connected to C
out
with the
lowest impedance connection.
Reserved for production. Must be connected to GND plane in final application
Reserved for production. Must be connected to GND plane in final application
1
2
16
18
5
6
7
8
INP
INM
OUTM
OUTP
WM
SD
GS
C2N
I
I
O
O
I
I
I
P
10
C1N
P
13
C2P
P
14
C1P
P
15
VB_OUT
O
11
19
RES1
RES2
I
I
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3
NCP2830
MAXIMUM RATINGS
Rating
AVDD, PVDD Pins: Power Supply Voltage (Note 2)
Digital Input WM; SD; GS Pin:
Human Body Model (HBM) ESD Rating are (Note 3)
Machine Model (MM) ESD Rating are (Note 3)
Latch up Current Maximum Rating
QFN 3 x 3 mm Package (Note 7) Thermal Resistance Junction−to−Case
Operating Ambient Temperature Range
Operating Junction Temperature Range
Maximum Junction Temperature (Note 6)
Storage Temperature Range
Moisture Sensitivity (Note 5)
Input Voltage
Input Current
Symbol
V
IN
V
DG
I
DG
ESD HBM
ESD MM
I
LU
R
qJC
T
A
T
J
T
JMAX
T
STG
MSL
Value
−
0.3 to + 7.0
−0.3
to V
DD
+ 0.3
1
2000
200
(Note 4)
29 (Note 7)
−40
to +85
−40
to +125
+150
−65
to +150
Level 1
Unit
V
V
mA
V
V
mA
°C/W
°C
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
A
= 25
°C.
2. According to JEDEC standard JESD22−A108B.
3. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM)
$2.0
kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM)
$200
V per JEDEC standard: JESD22−A115 for all pins.
4. Latch up Current Maximum Rating:
$100
mA for all pins, except digital pins per JEDEC standard: JESD78 class II.
$10mA
for Digital Pins per JEDEC standard: JESD78 class II
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
6. The thermal shutdown set to 150°C (typical) avoids irreversible damage on the device due to power dissipation.
7. The R
qCA
is dependent of the PCB heat dissipation. The maximum power dissipation (PD) is dependent by the min input voltage, the max
output current and external components selected.
R
qCA
125
*
T
A
P
D
*
R
qJC
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4
NCP2830
ELECTRICAL CHARACTERISTICS
Min and Max Limits apply for T
A
between
−40°C
to +85°C and T
J
up to + 125°C for V
IN
between 2.5 V to 5.5 V (Unless otherwise noted). Typical values are referenced to T
A
= + 25°C and V
IN
= 3.6 V (Note 8)
Symbol
GLOBAL SYSTEM
V
DD
I
SD
I
SD
I
Q
I
Q
I
Q
R
SD
R
WM
R
GS
V
IH
V
IL
F
SW1
V
B
V
B
V
B−Ripple
T
Precharge
V
TR1
V
TR2
Operating System Voltage
Shutdown Current
Shutdown Current
Quiescent Current
Quiescent Current
Quiescent Current
Resistance from SD to GND
Resistance from WM to GND
Resistance from GS to GND
Digital Pins High Voltage
Digital Pins Low Voltage
V
SD
= low, V
GS
= Low, V
WM
= Low
V
SD
= low, V
GS
= Low, V
WM
= Low, V
p
= 5.5 V (Note 9)
2X Mode, No load
1.5X Mode, No load
Wire Mode, No load
2.7
−
−
−
−
−
−
−
−
1.2
−
−
0.01
−
9.5
7
3
350
350
350
−
−
5.5
−
1.5
11
8
4.5
−
−
−
−
0.4
V
mA
mA
mA
mA
mA
kW
kW
kW
V
V
Parameter
Conditions
Min
Typ
Max
Unit
BOOST SECTION
Charge Pump Switching Frequency
Output Regulated Voltage
Output Regulated Voltage
Output Voltage Ripple
Precharge time
Transition Voltage between 2X Mode
and 1.5X Mode
Transition Voltage between 2X Mode
and Wire Mode
No Load, V
INM
=V
INP
=0, V
WM
= Low, 2X
Mode
No Load, V
INM
= V
INP
= 0, V
WM
= Low,
1.5X Mode
No Load, V
INM
= V
INP
= 0, V
WM
= Low,
2X Mode or 1.5X Mode
C5 = C6 = 10
mF
550
4.75
4.75
−
−
−
−
650
5
5
7
1.6
3.8
4.65
750
5.25
5.25
−
−
−
−
kHz
V
V
mV
ms
V
V
CLASS D SECTION
F
SW2
R
INL
R
INH
Z
SD
G
HI
G
LO
V
OS
T
start
T
OFF
V
N
V
N
THD+N
THD+N
Class D Switching frequency
Audio Input resistance
Audio Input resistance
Shutdown impedance
Gain High
Gain Low
Output Offset Voltage
Turn ON time
Turn Off time
Output Noise Voltage
Output Noise Voltage
Total harmonic distortion + Noise
Total harmonic distortion + Noise
No Filter
A−Weighting filter
P
out
= 0.25 W, f = 1 kHz, R
L
= 8
W
P
out
= 1 W, f = 1 kHz, R
L
= 8
W
V
GS
= Low (Note 10)
V
GS
= High (Note 10)
V
SD
= Low
V
GS
= High, RL = 8
W
V
GS
= Low, RL = 8
W
V
INM
= V
INP
= 0
V
B
= V
DD
, V
SD
= High
275
−
−
−
1.85
3.7
−
−
−
−
−
−
−
325
15
7.5
20
2
4
1
200
1
56
37
0.04
0.2
375
−
−
−
2.15
4.3
−
−
−
−
−
−
−
kHz
kW
kW
kW
V/V
V/V
mV
ms
ms
mV
RMS
mV
RMS
%
%
8. Performances guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
T
J
= T
A
= 25°C.
9. The maximum value is measured at 85°C
10. Guaranteed by design
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