NCP1397A/B, NCV1397A/B
High Performance Resonant
Mode Controller with
Integrated High-Voltage
Drivers
The NCP1397 is a high performance controller that can be utilized
in half bridge resonant topologies such as series resonant, parallel
resonant and LLC resonant converters. It integrates 600 V gate
drivers, simplifying layout and reducing external component count.
With its unique architecture, including a 500 kHz Voltage Controlled
Oscillator whose control mode permits flexibility when an ORing
function is required, the NCP1397 delivers everything needed to build
a reliable and rugged resonant mode power supply.
The NCP1397 provides a suite of protection features with
configurable settings to optimize any application. These include:
auto−recovery or fault latch−off, brown−out, open optocoupler,
soft−start and short−circuit protection. Deadtime is also adjustable to
overcome shoot through current.
Features
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16
1
SO−16, LESS PIN 13
D SUFFIX
CASE 751AM
MARKING DIAGRAMS
16
NCx1397yG
AWLYWW
1
x
y
A
WL
Y
WW
G
= P (standard) or V (automotive)
= A or B
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
High−Frequency Operation from 50 kHz up to 500 kHz
600 V High−Voltage Floating Driver
Adjustable Minimum Switching Frequency with
±3%
Accuracy
Adjustable Deadtime from 100 ns to 2
ms.
Startup Sequence Via an Externally Adjustable Soft−Start
Brown−Out Protection for a Simpler PFC Association
Latched Input for Severe Fault Conditions, e.g. Over Temperature
or OVP
Timer−Based Input with Auto−Recovery Operation for Delayed
Event Reaction
Latched Overcurrent Protection
Disable Input for Immediate Event Reaction or Simple ON/OFF
Control
V
CC
Operation up to 20 V
Low Startup Current of 300
mA
1 A/0.5 A Peak Current Sink/Source Drive Capability
Common Collector Optocoupler Connection for Easier ORing
Optional Common Emitter Optocoupler Connection
Internal Temperature Shutdown
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN CONNECTIONS
CSS(dis) 1
Fmax 2
Ctimer 3
Rt 4
BO 5
FB 6
DT 7
Skip/Disable 8
(Top View)
12 V
CC
11 Mlower
10 GND
9 Fault
16 Vboot
15 Mupper
14 HB
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 26 of this data sheet.
Typical Applications
•
Flat Panel Display Power Converters
•
High Power ac−dc Adapters for Notebooks
•
Computing Power Supplies
©
Semiconductor Components Industries, LLC, 2015
•
Industrial and Medical Power Sources
•
Offline Battery Chargers
1
October, 2015 − Rev. 6
Publication Order Number:
NCP1397/D
NCP1397A/B, NCV1397A/B
R18
Figure 1. Typical Application Example
PIN FUNCTION DESCRIPTION
Pin #
1
2
3
4
5
6
7
8
Pin Name
CSS(dis)
Fmax
Ctimer
Rt
BO
FB
DT
Skip/Disable
Function
Soft−Start Discharge
Maximum frequency clamp
Timer duration
Minimum frequency clamp
Brown−Out
Feedback
Deadtime
Skip or Disable input
Pin Description
Soft−start capacitor discharge pin. Connect to the soft−start capacitor to reset it
before startup or during overload conditions.
A resistor sets the maximum frequency excursion
Sets the timer duration in presence of a fault
Connecting a resistor to this pin, sets the minimum oscillator frequency reached
for V
FB
= 1 V.
Detects low input voltage conditions. When brought above V
latch
(4 V typically), it
fully latches off the controller.
Injecting current into this pin increases the oscillation frequency up to Fmax.
A simple resistor adjusts the dead−time width
Upon release, a clean startup sequence occurs if V
FB
< 0.3 V. During the skip
mode, when FB doesn’t drop below 0.3 V, the IC restarts without soft−start
sequence.
When asserted, the external timer starts to countdown and shuts down the
controller at the end of its time duration. Simultaneously the Soft−Start discharge
switch is activated so the converter operating frequency goes up to protect
application power stage. This input features also second fault comparator with
higher threshold (1.5 V typically) that:
A) Speeds up the timer capacitor charging current 8 times – NCP1397A
B) latches off the IC permanently – NCP1397B
In both versions the second fault comparator helps to protect application in case
of short circuit on the output or transformer secondary winding.
−
Drives the lower side MOSFET
The controller accepts up to 20 V
Increases the creepage distance
Connects to the half−bridge output
Drives the higher side MOSFET
The floating V
CC
supply for the upper stage
9
Fault
Fault detection input
10
11
12
13
14
15
16
GND
Mlower
V
CC
NC
HB
Mupper
Vboot
Analog ground
Low side output
Supplies the controller
Not connected
Half−bridge connection
High side output
Bootstrap pin
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NCP1397A/B, NCV1397A/B
VDD
Temperature
Shutdown
S
D
+
−
−
Rt
C
I = Imax for Vfb = 5.3 V
I = 0 for Vfb < Vfb(min)
IDT
+
DT Adj.
R
VCC
Management
50% DC
FF
Mupper
Clk
Q
Q
Vref
Imin
VFB
VFB(o )
Vref
V
BOOT
BO
Reset
VDD
PON
Reset
Fault
Timeout
Fault
Itimer2
Fast
Fault
HB
Imax
VFB = 5
VDD
Vref
Itimer1
Fmax
Vdd
UVLO
Timer
+
−
−
+
Vref
Timeout
Fault
Level
Shifter
NC
PON Reset
Vtimer OFF
Reset
PON Reset
Fault
SS(dis)
Fault
Enable
(if Vfb<0.3V)
V
CC
FB
+
−
−
G=1
> 0 only
VDD
V=V (FB) −− VFB(min)
Mlower
RFB
+
−
−
+
VFB(fault)
+
VFB(min)
−
−
Vref
+
Deadtime
Adjustment
Vref Skip/Disable
+
20 ns Noise
Filter
GND
Skip/
Disable
DT
VDD
IDT
IBO
20 ms Noise
Filter
Q
Q
R
PON Reset
BO
+
−
−
+
VBO
+
−
−
+
Vlatch
+
−
−
20 ms Noise
Filter
S
Fault
+
Vref(fault)
+
−
−
Vref(OCP)
+
1 ms Noise
Filter
Figure 2. Internal Circuit Architecture (NCP1397A)
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3
NCP1397A/B, NCV1397A/B
VDD
Temperature
Shutdown
S
D
+
−
−
Rt
C
I = Imax for Vfb = 5.3 V
I = 0 for Vfb < Vfb_min
VDD
PON
Reset
Fault
Timeout
Fault
Fast
Fault
HB
IDT
+
DT Adj.
R
VCC
Management
50% DC
FF
Mupper
Clk
Q
Q
Vref
Imin
VFB
VFB(o )
Vref
V
BOOT
BO
Reset
Imax
Vfb = 5
VDD
Vref
Itimer1
Fmax
If FAULT Itimer else 0
Timer
UVLO
+
−
−
+
Vref
Level
Shifter
Timeout
Fault
NC
PON Reset
Vtimer OFF
Reset
PON Reset
Fault
SS(dis)
Fault
Enable
(if Vfb<0.3V)
V
CC
FB
G=1
+
−
−
> 0 only
VDD
V=V (FB) −− VFB(min)
Mlower
RFB
+
−
−
+
VFB(fault)
+
VFB(min)
−
−
Vref
+
Deadtime
Adjustment
Vref Skip
+
GND
Skip/
Disable
20 ns Noise
Filter
DT
IDT
VDD
20 ms Noise
Filter
IBO
Q
BO
+
−
−
+
VBO
Fault
+
Vref(fault)
Vref(OCP)
+
+
−
−
+
−
−
1 ms Noise
Filter
+
−
−
+
Vlatch
20 ms Noise
Filter
S
Q
R
PON Reset
Figure 3. Internal Circuit Architecture (NCP1397B)
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4
NCP1397A/B, NCV1397A/B
MAXIMUM RATINGS
Rating
High Voltage bridge pin, pin 14
Floating supply voltage, ground referenced
High side output voltage
Low side output voltage
Allowable output slew rate
Power Supply voltage, pin 12
Maximum voltage, all pins (except pin 11 and 10)
Thermal Resistance Junction−to−Air, SOIC version
Storage Temperature Range
ESD Capability, Human Body Model (HBM) (All pins except HV pins)
ESD Capability, Machine Model (MM)
Symbol
V
BRIDGE
V
BOOT
− V
BRIDGE
V
DRV(HI)
V
DRV(LO)
dV
BRIDGE
/dt
V
CC
−
R
qJA
−
−
−
Value
−1 to 600
0 to 20
V
BRIDGE
−0.3 to
V
BOOT
+0.3
−0.3 to V
CC
+0.3
50
20
−0.3 to 10
130
−60 to +150
2
200
Unit
V
V
V
V
V/ns
V
V
°C/W
°C
kV
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device(s) contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC Standard JESD22−A114E
Machine Model 200 V per JEDEC Standard JESD22−A115−A
2. This device meets latchup tests defined by JEDEC Standard JESD78.
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